{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,11]],"date-time":"2026-03-11T17:09:16Z","timestamp":1773248956211,"version":"3.50.1"},"reference-count":56,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","funder":[{"name":"\u201cComputation-in-memory architecture based on resistive devices\u201d (MNEMOSENE), through the European Union\u2019s Horizon 2020 Research and Innovation Programme","award":["ICT-31-2017 RIA"],"award-info":[{"award-number":["ICT-31-2017 RIA"]}]},{"name":"\u201cComputation-in-memory architecture based on resistive devices\u201d (MNEMOSENE), through the European Union\u2019s Horizon 2020 Research and Innovation Programme","award":["780215"],"award-info":[{"award-number":["780215"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2021,5]]},"DOI":"10.1109\/tcsi.2021.3061214","type":"journal-article","created":{"date-parts":[[2021,3,3]],"date-time":"2021-03-03T20:52:17Z","timestamp":1614804737000},"page":"1917-1930","source":"Crossref","is-referenced-by-count":23,"title":["SRIF: Scalable and Reliable Integrate and Fire Circuit ADC for Memristor-Based CIM Architectures"],"prefix":"10.1109","volume":"68","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-2729-7057","authenticated-orcid":false,"given":"Abhairaj","family":"Singh","sequence":"first","affiliation":[]},{"given":"Muath Abu","family":"Lebdeh","sequence":"additional","affiliation":[]},{"given":"Anteneh","family":"Gebregiorgis","sequence":"additional","affiliation":[]},{"given":"Rajendra","family":"Bishnoi","sequence":"additional","affiliation":[]},{"given":"Rajiv V.","family":"Joshi","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8961-0387","authenticated-orcid":false,"given":"Said","family":"Hamdioui","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"crossref","DOI":"10.1088\/0268-1242\/29\/10\/104001","article-title":"If it’s pinched it’s a memristor","volume":"29","author":"chua","year":"2014","journal-title":"Semicond Sci Technol"},{"key":"ref38","article-title":"Pinched hysteresis loops is the fingerprint of memristive devices","author":"kim","year":"2012","journal-title":"arXiv 1202 2437"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2010.2101055"},{"key":"ref32","first-page":"1301","article-title":"Spintronic memristor based temperature sensor design with CMOS current reference","author":"bi","year":"2012","journal-title":"Proc Design Autom Test Eur Conf Exhibition (DATE)"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1088\/1361-6463\/ab37b6"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2018.8614558"},{"key":"ref37","doi-asserted-by":"crossref","first-page":"311","DOI":"10.1515\/ntrev-2015-0029","article-title":"State of the art of metal oxide memristor devices","volume":"5","author":"mohammad","year":"2016","journal-title":"Nanotechnol Rev"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1063\/1.4790158"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2018.2849872"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1088\/0957-4484\/22\/28\/289502"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.55"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIT.2019.8776485"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/4.705359"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-018-0092-2"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-018-0054-8"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744783"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2020.3015178"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001140"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/3352460.3358328"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2016.46"},{"key":"ref26","first-page":"242","article-title":"15.3 A 351TOPS\/W and 372.4 GOPS compute-in-memory SRAM macro in 7 nm FinFET CMOS for machine-learning applications","author":"dong","year":"2020","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2017.7858397"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/BIOCAS.2019.8919068"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2018.8351276"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2161368"},{"key":"ref55","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2009.5424411"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2017.8050922"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2015.2426531"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2230515"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1038\/s41565-020-0655-z"},{"key":"ref11","first-page":"486","article-title":"Applications of computation-in-memory architectures based on memristive devices","author":"hamdioui","year":"2019","journal-title":"Proc Eur Conf Exhib Design Autom Test"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-33137-4_1"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2014.2356439"},{"key":"ref13","doi-asserted-by":"crossref","first-page":"629","DOI":"10.1186\/1556-276X-9-629","article-title":"Neuromorphic crossbar circuit with nanoscale filamentary-switching binary memristors for speech recognition","volume":"9","author":"truong","year":"2014","journal-title":"Nanosc Res Lett"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1002\/adma.201705914"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2017.8268469"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2019.8702600"},{"key":"ref17","first-page":"242","article-title":"Memristor-based approximated computation","author":"li","year":"2013","journal-title":"Proc Int Symp Low-Power Electronics Design"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001139"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898010"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JXCDC.2017.2697910"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/2996192"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-019-0274-6"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-019-0270-x"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/IDT.2008.4802475"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996588"},{"key":"ref49","doi-asserted-by":"crossref","first-page":"722","DOI":"10.23919\/DATE.2017.7927083","article-title":"Memristor for computing: Myth or reality?","author":"hamdioui","year":"2017","journal-title":"Proc Design Autom Test Eur Conf Exhibition (DATE)"},{"key":"ref9","year":"2020","journal-title":"International Roadmap for Devices and Systems (IRDS)"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744900"},{"key":"ref45","article-title":"Multiplier-based processor-in-memory architectures for image and graphics processing","author":"lin","year":"2007"},{"key":"ref48","first-page":"1718","article-title":"Memristor based computation-in-memory architecture for data-intensive applications","author":"hamdioui","year":"2015","journal-title":"Proc Design Autom Test Eur Conf Exhib"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2016.2574353"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.14778\/1454159.1454171"},{"key":"ref41","article-title":"Computing in the age of parallelism: Challenges and opportunities","author":"janneck","year":"2013","journal-title":"keynote talk"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/T-C.1975.224157"},{"key":"ref43","article-title":"Cache prefetching of L2 and L3","author":"mayfield","year":"2002"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/9408528\/09368978.pdf?arnumber=9368978","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,26]],"date-time":"2022-01-26T11:32:56Z","timestamp":1643196776000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9368978\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,5]]},"references-count":56,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2021.3061214","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2021,5]]}}}