{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,19]],"date-time":"2026-06-19T16:30:07Z","timestamp":1781886607095,"version":"3.54.5"},"reference-count":37,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2021,6,1]],"date-time":"2021-06-01T00:00:00Z","timestamp":1622505600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/legalcode"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61934001"],"award-info":[{"award-number":["61934001"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2021,6]]},"DOI":"10.1109\/tcsi.2021.3063409","type":"journal-article","created":{"date-parts":[[2021,3,12]],"date-time":"2021-03-12T20:46:01Z","timestamp":1615581961000},"page":"2341-2353","source":"Crossref","is-referenced-by-count":14,"title":["A Cascaded Mode-Switching Sub-Sampling PLL With Quadrature Dual-Mode Voltage Waveform-Shaping Oscillator"],"prefix":"10.1109","volume":"68","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-6606-9057","authenticated-orcid":false,"given":"Yiyang","family":"Shu","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7203-614X","authenticated-orcid":false,"given":"Huizhen Jenny","family":"Qian","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1318-9418","authenticated-orcid":false,"given":"Xun","family":"Luo","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref33","first-page":"150","article-title":"A 10 mW 37.8GHz current-redistribution BiCMOS VCO with an average FOM$_{T}$\n of&#x2013;193.5dBc\/Hz","author":"wu","year":"2013","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/IEEE-IWS.2015.7164564"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/4.658619"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2016.2529218"},{"key":"ref37","first-page":"268","article-title":"A 30GHz digital sub-sampling fractional-N PLL with 198fsrms jitter in 65nm LP CMOS","author":"grimaldi","year":"2019","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2746669"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2016.7417895"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2818681"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TMTT.2016.2647698"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TMTT.2019.2906614"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.903047"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TMTT.2015.2407356"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.874333"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2293021"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2273823"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2285375"},{"key":"ref18","first-page":"1","article-title":"A waveform-shaping millimeter-wave oscillator with 184.7dBc\/Hz FOM in 40nm digital CMOS process","author":"luo","year":"2015","journal-title":"IEEE MTT-S Int Microw Symp Dig"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2697442"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2015.2451915"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2820149"},{"key":"ref27","first-page":"216","article-title":"A 20.7&#x2013;31.8GHz dual-mode voltage waveform-shaping oscillator with 195.8dBc\/Hz FoM$_{T}$\n in 28nm CMOS","author":"shu","year":"2018","journal-title":"Proc IEEE Radio Freq Integr Circuits Symp (RFIC)"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2018.8310278"},{"key":"ref6","first-page":"366","article-title":"A&#x2013;31dBc integrated-phase-noise 29GHz fractional-N frequency synthesizer supporting multiple frequency bands for backward-compatible 5G using a frequency doubler and injection-locked frequency multipliers","author":"yoon","year":"2018","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1966.4682"},{"key":"ref5","first-page":"50","article-title":"A mixed-mode injection frequency-locked loop for self-calibration of injection locking range and phase noise in $0.13~\\mu\\text{m}$\n CMOS","author":"shin","year":"2016","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2032723"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2320952"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2361351"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2010.5433841"},{"key":"ref1","first-page":"192","article-title":"A 13.1-to-28GHz fractional-N PLL in 32nm SOI CMOS with a $\\Delta\\Sigma$\n noise-cancellation scheme","author":"ferriss","year":"2015","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref20","first-page":"376","article-title":"A quad-core 15GHz BiCMOS VCO with&#x2013;124dBc\/Hz phase noise at 1MHz offset,&#x2013;189dBc\/Hz FOM, and robust to multimode concurrent oscillations","author":"padovan","year":"2018","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TMTT.2010.2091203"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2865460"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2867269"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TMTT.2015.2409252"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2019.8662502"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2901253"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/9442414\/09377489.pdf?arnumber=9377489","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,12,17]],"date-time":"2021-12-17T20:00:46Z","timestamp":1639771246000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9377489\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,6]]},"references-count":37,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2021.3063409","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2021,6]]}}}