{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,1]],"date-time":"2026-04-01T17:52:29Z","timestamp":1775065949726,"version":"3.50.1"},"reference-count":42,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[2021,12,1]],"date-time":"2021-12-01T00:00:00Z","timestamp":1638316800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,12,1]],"date-time":"2021-12-01T00:00:00Z","timestamp":1638316800000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100012166","name":"National Key Research and Development Program of China","doi-asserted-by":"publisher","award":["2020YFB2206001"],"award-info":[{"award-number":["2020YFB2206001"]}],"id":[{"id":"10.13039\/501100012166","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62004002"],"award-info":[{"award-number":["62004002"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["92064004"],"award-info":[{"award-number":["92064004"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100013314","name":"111 Project","doi-asserted-by":"publisher","award":["B18001"],"award-info":[{"award-number":["B18001"]}],"id":[{"id":"10.13039\/501100013314","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2021,12]]},"DOI":"10.1109\/tcsi.2021.3122327","type":"journal-article","created":{"date-parts":[[2021,11,2]],"date-time":"2021-11-02T21:30:38Z","timestamp":1635888638000},"page":"4900-4909","source":"Crossref","is-referenced-by-count":16,"title":["Optimization Schemes for In-Memory Linear Regression Circuit With Memristor Arrays"],"prefix":"10.1109","volume":"68","author":[{"given":"Shiqing","family":"Wang","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1856-0279","authenticated-orcid":false,"given":"Zhong","family":"Sun","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1222-0508","authenticated-orcid":false,"given":"Yuheng","family":"Liu","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7848-5958","authenticated-orcid":false,"given":"Shengyu","family":"Bao","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6854-8211","authenticated-orcid":false,"given":"Yimao","family":"Cai","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1853-1614","authenticated-orcid":false,"given":"Daniele","family":"Ielmini","sequence":"additional","affiliation":[]},{"given":"Ru","family":"Huang","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317870"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898010"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2019.2958053"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2014.2327390"},{"key":"ref31","author":"cox","year":"2002","journal-title":"Fundamentals of Linear Electronics Integrated and Discrete"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001139"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1002\/cta.1898"},{"key":"ref36","author":"hogervorst","year":"2010","journal-title":"Design of Low-Voltage Low-Power Operational Amplifier Cells"},{"key":"ref35","author":"zumbahlen","year":"2008","journal-title":"Linear Circuit Design Handbook"},{"key":"ref34","author":"carter","year":"2009","journal-title":"Op Amps for Everyone"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2020.2992435"},{"key":"ref40","author":"kay","year":"2012","journal-title":"Operational Amplifier Noise Techniques and Tips for Analyzing and Reducing Noise"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1002\/aisy.202000042"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1126\/sciadv.aay2378"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.3389\/fnins.2021.651452"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3061973"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.2978460"},{"key":"ref16","article-title":"Benchmarking tinyML systems: Challenges and direction","author":"banbury","year":"2020","journal-title":"arXiv 2003 04821"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1017\/S0305004100030401"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1016\/j.mattod.2015.11.009"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1002\/adma.201801187"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2018.8614551"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1002\/9783527680870"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2016.2622716"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-018-0092-2"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-017-0002-z"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2018.8614558"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1038\/s41586-020-1942-4"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1073\/pnas.1815682116"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2021.3068764"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1038\/s41565-020-0655-z"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2020.2966908"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1609\/aaai.v34i09.7123"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1002\/adma.201802554"},{"key":"ref22","author":"razavi","year":"2001","journal-title":"Design of Analog CMOS Integrated Circuits"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1002\/aisy.202000040"},{"key":"ref42","author":"rojas","year":"1996","journal-title":"Neural Networks A Systematic Introduction"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1515\/9781400828739"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1002\/cta.2015"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1137\/S0036144500381988"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1039\/C6NR04142F"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1098\/rspa.2017.0457"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/9629436\/09599582.pdf?arnumber=9599582","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,3,8]],"date-time":"2022-03-08T21:36:07Z","timestamp":1646775367000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9599582\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,12]]},"references-count":42,"journal-issue":{"issue":"12"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2021.3122327","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2021,12]]}}}