{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,19]],"date-time":"2026-06-19T16:32:51Z","timestamp":1781886771878,"version":"3.54.5"},"reference-count":42,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"9","license":[{"start":{"date-parts":[[2022,9,1]],"date-time":"2022-09-01T00:00:00Z","timestamp":1661990400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2022,9,1]],"date-time":"2022-09-01T00:00:00Z","timestamp":1661990400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,9,1]],"date-time":"2022-09-01T00:00:00Z","timestamp":1661990400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100000266","name":"Engineering and Physical Sciences Research Council (EPSRC) Programme Grant Functional Oxides for Reconfigurable Technologies","doi-asserted-by":"publisher","award":["EP\/R024642\/1"],"award-info":[{"award-number":["EP\/R024642\/1"]}],"id":[{"id":"10.13039\/501100000266","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100000287","name":"Royal Academy of Engineering (RAEng) Chair in Emerging Technologies","doi-asserted-by":"publisher","award":["CiET1819\/2\/93"],"award-info":[{"award-number":["CiET1819\/2\/93"]}],"id":[{"id":"10.13039\/501100000287","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2022,9]]},"DOI":"10.1109\/tcsi.2022.3182577","type":"journal-article","created":{"date-parts":[[2022,6,17]],"date-time":"2022-06-17T19:28:57Z","timestamp":1655494137000},"page":"3512-3525","source":"Crossref","is-referenced-by-count":17,"title":["An Adiabatic Capacitive Artificial Neuron With RRAM-Based Threshold Detection for Energy-Efficient Neuromorphic Computing"],"prefix":"10.1109","volume":"69","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-9192-2961","authenticated-orcid":false,"given":"Sachin","family":"Maheshwari","sequence":"first","affiliation":[{"name":"Centre for Electronics Frontiers, School of Engineering, The University of Edinburgh, Edinburgh, U.K."}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8034-2398","authenticated-orcid":false,"given":"Alexander","family":"Serb","sequence":"additional","affiliation":[{"name":"Centre for Electronics Frontiers, School of Engineering, The University of Edinburgh, Edinburgh, U.K."}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8003-2146","authenticated-orcid":false,"given":"Christos","family":"Papavassiliou","sequence":"additional","affiliation":[{"name":"Department of Electrical and Electronic Engineering, Imperial College London, London, U.K."}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6267-6909","authenticated-orcid":false,"given":"Themistoklis","family":"Prodromakis","sequence":"additional","affiliation":[{"name":"Centre for Electronics Frontiers, School of Engineering, The University of Edinburgh, Edinburgh, U.K."}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","volume-title":"Analog VLSI and Neural Systems","author":"Mead","year":"1989"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/359576.359579"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.3389\/fnins.2015.00141"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/s00429-021-02347-z"},{"key":"ref5","volume-title":"Circuits Within the Cerebellum","author":"Purves","year":"2001"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2014.6865269"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/NER.2011.5910490"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1002\/adma.201604310"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1016\/S0045-7906(97)00043-8"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1007\/978-81-322-3703-7_6"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/31.68299"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.3389\/fnins.2016.00482"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2902475"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2019.8885023"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1049\/el.2013.2463"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1038\/s41467-018-05677-5"},{"key":"ref17","volume-title":"Memcapacitive cross-bar array for determining a dot product","author":"Ge","year":"2019"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-021-00649-y"},{"key":"ref19","article-title":"Memcapacitive devices in logic and crossbar applications","volume-title":"arXiv:1704.05921","author":"Tran","year":"2017"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1088\/0957-4484\/26\/22\/225201"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1007\/978-94-007-2345-0"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/PHYCMP.1992.615554"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/PESC.1995.474793"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/PRIME.2016.7519499"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/PATMOS.2016.7833684"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2018.04.002"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2020.06.007"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2007.378651"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS51556.2021.9401142"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2018.8351250"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1007\/BF02478259"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/IECBES.2018.8626714"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ICRC.2017.8123661"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2014.88"},{"key":"ref35","article-title":"Asymptotically zero energy computing using splitlevel charge recovery logic","author":"Younis","year":"1994"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2015.2438017"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.3390\/mi12050551"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2791468"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2021.3101996"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1002\/cta.3101"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/TEC.2006.874230"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS48785.2022.9937701"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/9865857\/09799538.pdf?arnumber=9799538","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,2,1]],"date-time":"2024-02-01T05:17:53Z","timestamp":1706764673000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9799538\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,9]]},"references-count":42,"journal-issue":{"issue":"9"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2022.3182577","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2022,9]]}}}