{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,13]],"date-time":"2026-02-13T12:01:47Z","timestamp":1770984107449,"version":"3.50.1"},"reference-count":37,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[2022,12,1]],"date-time":"2022-12-01T00:00:00Z","timestamp":1669852800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2022,12,1]],"date-time":"2022-12-01T00:00:00Z","timestamp":1669852800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,12,1]],"date-time":"2022-12-01T00:00:00Z","timestamp":1669852800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100006410","name":"Analog Devices Inc.","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100006410","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100000038","name":"NSERC","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100000038","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2022,12]]},"DOI":"10.1109\/tcsi.2022.3200835","type":"journal-article","created":{"date-parts":[[2022,9,2]],"date-time":"2022-09-02T19:49:54Z","timestamp":1662148194000},"page":"4731-4740","source":"Crossref","is-referenced-by-count":7,"title":["A Design Methodology for Achieving Near Nyquist Continuous Time Pipelined ADCs"],"prefix":"10.1109","volume":"69","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-9511-0143","authenticated-orcid":false,"given":"M. Wagih","family":"Ismail","sequence":"first","affiliation":[{"name":"Edward S. Rogers Sr. Department of Electrical & Computer Engineering, University of Toronto, Toronto, ON, Canada"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5333-4619","authenticated-orcid":false,"given":"Hajime","family":"Shibata","sequence":"additional","affiliation":[{"name":"Analog Devices Canada, Toronto, ON, Canada"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7621-2227","authenticated-orcid":false,"given":"Zhao","family":"Li","sequence":"additional","affiliation":[{"name":"Analog Devices Canada, Toronto, ON, Canada"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5952-3162","authenticated-orcid":false,"given":"Sharvil","family":"Patil","sequence":"additional","affiliation":[{"name":"Analog Devices Canada, Toronto, ON, Canada"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0977-7516","authenticated-orcid":false,"given":"Tony Chan","family":"Carusone","sequence":"additional","affiliation":[{"name":"Edward S. Rogers Sr. Department of Electrical & Computer Engineering, University of Toronto, Toronto, ON, Canada"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1137\/S1052623496303470"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2763129"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2020.3048850"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2048137"},{"key":"ref37","first-page":"1","article-title":"Adaptive digital noise-cancellation filtering using cross-correlators for continuous-time MASH ADC in 28nm CMOS","author":"dong","year":"2017","journal-title":"Proc IEEE Custom Integr Circuits Conf (CICC)"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3121418"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3082943"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2007.916693"},{"key":"ref10","first-page":"94","article-title":"5.1 A 240×192 pixel 10fps 70klux 225m-range automotive LiDAR SoC using a 40ch 0.0036 mm2 voltage\/time dual-data-converter-based AFE","author":"kondo","year":"2020","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9062936"},{"key":"ref12","first-page":"92","article-title":"A 20ch TDC\/ADC hybrid SoC for 240×96-pixel 10%-reflection ¡0.125%-precision 200m-range imaging LiDAR with smart accumulation technique","author":"yoshioka","year":"2018","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref13","first-page":"68c","article-title":"A 75.8dB-SNDR pipeline SAR ADC with 2nd-order interstage gain error shaping","author":"hsu","year":"2019","journal-title":"Proc Symp VLSI Circuits"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2747128"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2005.853909"},{"key":"ref16","author":"murmann","year":"2021","journal-title":"ADC Performance Survey 1997–2020"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2258814"},{"key":"ref18","first-page":"254","article-title":"16.3 A single-channel 5.5 mW 3.3GS\/s 6b fully dynamic pipelined ADC with post-amplification residue generation","author":"zheng","year":"2020","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref19","first-page":"470","article-title":"A 4GHz CT ?? ADC with 70dB DR and ?74dBFS THD in 125MHz BW","author":"bolatkale","year":"2011","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2009.5280858"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3109167"},{"key":"ref27","first-page":"278","article-title":"16.2 A 9GS\/s 1GHz-BW oversampled continuous-time pipeline ADC achieving ?161dBFS\/Hz NSD","author":"shibata","year":"2017","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2003.1234315"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2938414"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2008.4672050"},{"key":"ref5","first-page":"132","article-title":"8.4 A 116Gb\/s DSP-based wireline transceiver in 7nm CMOS achieving 6pJ\/b at 45dB loss in PAM-4\/duo-PAM-4 and 52dB in PAM-2","author":"lacroix","year":"2021","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref8","first-page":"122","article-title":"6.4 A 56Gb\/s 7.7 mW\/Gb\/s PAM-4 wireline transceiver in 10nm FinFET using MM-CDR-based ADC timing skew control and low-power DSP with approximate multiplier","author":"yoo","year":"2020","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIC.2019.8778051"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS45731.2020.9180695"},{"key":"ref9","first-page":"466","article-title":"27.6 A 4GS\/s 13b pipelined ADC with capacitor and amplifier sharing in 16nm CMOS","author":"wu","year":"2016","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.3023882"},{"key":"ref20","first-page":"150","article-title":"DC-to-1GHz tunable RF ?? ADC achieving DR = 74dB and BW = 150MHz at f0 = 450MHz using 550mw","author":"shibata","year":"2012","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref22","first-page":"278","article-title":"15.5 A 930 mW 69dB-DR 465MHz-BW CT 1–2 MASH ADC in 28nm CMOS","author":"dong","year":"2016","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref21","doi-asserted-by":"crossref","first-page":"2868","DOI":"10.1109\/JSSC.2014.2364829","article-title":"A continuous-time 0–3 MASH ADC achieving 88 dB DR with 53 MHz BW in 28 nm CMOS","volume":"49","author":"yunzhi","year":"2014","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/LSSC.2021.3071965"},{"key":"ref23","first-page":"260","article-title":"16.6 An 800MHz-BW VCO-based continuous-time pipelined ADC with inherent anti-aliasing and on-chip digital reconstruction filter","author":"shibata","year":"2020","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref26","first-page":"260","article-title":"16.6 An 800MHz-BW VCO-based continuous-time pipelined ADC with inherent anti-aliasing and on-chip digital reconstruction filter","author":"shibata","year":"2020","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS47672.2021.9531832"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/9985434\/09874997.pdf?arnumber=9874997","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,1,9]],"date-time":"2023-01-09T21:25:20Z","timestamp":1673299520000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9874997\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,12]]},"references-count":37,"journal-issue":{"issue":"12"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2022.3200835","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2022,12]]}}}