{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,2]],"date-time":"2025-10-02T06:11:26Z","timestamp":1759385486721,"version":"3.37.3"},"reference-count":51,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"11","license":[{"start":{"date-parts":[[2023,11,1]],"date-time":"2023-11-01T00:00:00Z","timestamp":1698796800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2023,11,1]],"date-time":"2023-11-01T00:00:00Z","timestamp":1698796800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,11,1]],"date-time":"2023-11-01T00:00:00Z","timestamp":1698796800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001659","name":"Deutsche Forschungsgemeinschaft (DFG), as part of the projects OneMemory","doi-asserted-by":"publisher","award":["405422836"],"award-info":[{"award-number":["405422836"]}],"id":[{"id":"10.13039\/501100001659","id-type":"DOI","asserted-by":"publisher"}]},{"name":"NN-Thunder","award":["506419033"],"award-info":[{"award-number":["506419033"]}]},{"name":"research grants provided by the Ministry of Science and Technology of Taiwan","award":["MOST-111-2923-E-002-014-MY3","MOST-111-2218-E-002-026","MOST-109-2221-E-002-147-MY3"],"award-info":[{"award-number":["MOST-111-2923-E-002-014-MY3","MOST-111-2218-E-002-026","MOST-109-2221-E-002-147-MY3"]}]},{"name":"Macronix","award":["111HT912003"],"award-info":[{"award-number":["111HT912003"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2023,11]]},"DOI":"10.1109\/tcsi.2023.3305010","type":"journal-article","created":{"date-parts":[[2023,8,23]],"date-time":"2023-08-23T18:09:54Z","timestamp":1692814194000},"page":"4380-4393","source":"Crossref","is-referenced-by-count":4,"title":["Impact of Non-Volatile Memory Cells on Spiking Neural Network Annealing Machine With In-Situ Synapse Processing"],"prefix":"10.1109","volume":"70","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-3970-979X","authenticated-orcid":false,"given":"Ming-Liang","family":"Wei","sequence":"first","affiliation":[{"name":"Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4134-952X","authenticated-orcid":false,"given":"Mikail","family":"Yayla","sequence":"additional","affiliation":[{"name":"Department of Computer Science, Technical University of Dortmund, Dortmund, Germany"}]},{"given":"Shu-Yin","family":"Ho","sequence":"additional","affiliation":[{"name":"Macronix International Company Ltd., Hsinchu, Taiwan"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8114-9760","authenticated-orcid":false,"given":"Jian-Jia","family":"Chen","sequence":"additional","affiliation":[{"name":"Department of Computer Science, Technical University of Dortmund, Dortmund, Germany"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5649-3102","authenticated-orcid":false,"given":"Hussam","family":"Amrouch","sequence":"additional","affiliation":[{"name":"Chair of AI Processor Design and the Munich Institute of Robotics and Machine Intelligence (MIRMI), Technical University of Munich (TUM), München, Germany"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0091-5027","authenticated-orcid":false,"given":"Chia-Lin","family":"Yang","sequence":"additional","affiliation":[{"name":"Department of Computer Science and Information Engineering and the Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"}]}],"member":"263","reference":[{"key":"ref13","first-page":"52","article-title":"A 2×2-spin multichip scalable annealing processor based on a processing-in-memory approach for solving large-scale combinatorial optimization problems","author":"takemoto","year":"2019","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2949230"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.4018\/jkss.2012070102"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM19574.2021.9720619"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1126\/science.3755256"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM45625.2022.10019380"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.3389\/fnins.2016.00118"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/78.978381"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2021.3067593"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.3389\/fnins.2017.00714"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2017.7993628"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2011.2160265"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS45951.2020.9128323"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1287\/ijoc.3.4.376"},{"key":"ref48","first-page":"31.5.1","article-title":"Multi-level 40 nm WOX resistive memory with excellent reliability","author":"chien","year":"2011","journal-title":"IEDM Tech Dig"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS45951.2020.9129226"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS46558.2021.9405141"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.3389\/fnins.2020.00634"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM19573.2019.8993652"},{"key":"ref43","first-page":"76","article-title":"Poisson model of spike generation","volume":"5","author":"heeger","year":"2000","journal-title":"Handout University of Standford"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1007\/s11432-019-9910-x"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1063\/1.1699114"},{"key":"ref7","first-page":"19","article-title":"Viewing construction scheduling as a constraint satisfaction problem","author":"lorterapong","year":"2001","journal-title":"Proc 6th Int Conf Appl Artif Intell Civil Struct Eng"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.2307\/2986138"},{"key":"ref4","first-page":"103","article-title":"Secondary structures of RNA as a constraint satisfaction problem","volume":"10","author":"gaspin","year":"1994","journal-title":"Advances in Molecular Bioinformatics"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1023\/A:1011433605905"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1061\/(ASCE)CO.1943-7862.0000582"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1016\/j.jmb.2003.12.041"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2020.2987439"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD51958.2021.9643463"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/ISNE.2010.5669204"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-031-04520-2_1"},{"key":"ref36","article-title":"A tutorial on formulating and using QUBO models","author":"glover","year":"2018","journal-title":"arXiv 1811 11538"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.3384\/diss.diva-116859"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2018.8353615"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.3389\/fncom.2014.00136"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/IJCNN.2018.8489326"},{"article-title":"Constraint satisfaction in business process modelling","year":"2002","author":"tsang","key":"ref2"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISA.2008.59"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.23919\/DATE48585.2020.9116227"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1038\/ncomms8522"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2259038"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2474396"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/IJCNN.2017.7966154"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2014.2313565"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1007\/s11128-021-03003-5"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2018.112130359"},{"key":"ref21","first-page":"15","article-title":"BrainScales: Greater versatility for neuromorphic emulation","volume":"2021","author":"baumbach","year":"2021","journal-title":"Brain-Inspired Comput"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/3291054"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA45697.2020.00039"},{"key":"ref29","article-title":"SpikeSim: An end-to-end compute-in-memory hardware evaluation tool for benchmarking spiking neural networks","author":"moitra","year":"2022","journal-title":"arXiv 2210 12899"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/10296081\/10227833.pdf?arnumber=10227833","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,11,13]],"date-time":"2023-11-13T19:46:59Z","timestamp":1699904819000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10227833\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,11]]},"references-count":51,"journal-issue":{"issue":"11"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2023.3305010","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"type":"print","value":"1549-8328"},{"type":"electronic","value":"1558-0806"}],"subject":[],"published":{"date-parts":[[2023,11]]}}}