{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,21]],"date-time":"2026-05-21T11:53:27Z","timestamp":1779364407053,"version":"3.53.0"},"reference-count":33,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2025,2,1]],"date-time":"2025-02-01T00:00:00Z","timestamp":1738368000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,2,1]],"date-time":"2025-02-01T00:00:00Z","timestamp":1738368000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,2,1]],"date-time":"2025-02-01T00:00:00Z","timestamp":1738368000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"TrustSoC Project funded by French Agence de l\u2019innovation de D\u00e9fence"},{"name":"French Government through the Agence Nationale de la Recherche in the framework of Project ARchitectures SEcuris\u00e9es pour le Num\u00e9rique Embarqu\u00e9","award":["ANR-22-PECY-0004"],"award-info":[{"award-number":["ANR-22-PECY-0004"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2025,2]]},"DOI":"10.1109\/tcsi.2024.3413364","type":"journal-article","created":{"date-parts":[[2024,6,24]],"date-time":"2024-06-24T20:16:43Z","timestamp":1719260203000},"page":"497-509","source":"Crossref","is-referenced-by-count":1,"title":["Efficient Adaptive Multi-Level Privilege Partitioning With RTrustSoC"],"prefix":"10.1109","volume":"72","author":[{"ORCID":"https:\/\/orcid.org\/0009-0006-3166-9235","authenticated-orcid":false,"given":"Rapha\u00eble","family":"Milan","sequence":"first","affiliation":[{"name":"Universit&#x00E9; Jean Monnet Saint-Etienne, CNRS, Institut d Optique Graduate School, Laboratoire Hubert Curien UMR 5516, Saint-Etienne, France"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7964-3137","authenticated-orcid":false,"given":"Lilian","family":"Bossuet","sequence":"additional","affiliation":[{"name":"Universit&#x00E9; Jean Monnet Saint-Etienne, CNRS, Institut d Optique Graduate School, Laboratoire Hubert Curien UMR 5516, Saint-Etienne, France"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Lo\u00efc","family":"Lagadec","sequence":"additional","affiliation":[{"name":"Lab-STICC, ENSTA Bretagne, Brest, France"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0333-2564","authenticated-orcid":false,"given":"Carlos","family":"Andres Lara-Nino","sequence":"additional","affiliation":[{"name":"Departament d&#x2019;Enginyeria Inform&#x00E0;tica i Matem&#x00E0;tiques, Universitat Rovira i Virgili, Tarragona, Spain"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6028-3028","authenticated-orcid":false,"given":"Brice","family":"Colombier","sequence":"additional","affiliation":[{"name":"Universit&#x00E9; Jean Monnet Saint-Etienne, CNRS, Institut d Optique Graduate School, Laboratoire Hubert Curien UMR 5516, Saint-Etienne, France"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Th\u00e9otime","family":"Bollengier","sequence":"additional","affiliation":[{"name":"Lab-STICC, ENSTA Bretagne, Brest, France"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","volume-title":"Why We Don\u2019t Need New Phone Launches Every Year","author":"Lanxon","year":"2023"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2021.3065292"},{"key":"ref3","volume-title":"The Long Hack: How China Exploited a U.S. Tech Supplier","author":"Robertson","year":"2021"},{"key":"ref4","volume-title":"How a Shady Chinese Firms Encryption Chips Got Inside the U.S. Navy, NATO, and NASA","author":"Greenberg","year":"2023"},{"issue":"4","key":"ref5","first-page":"18","article-title":"TrustZone: Integrated hardware and software security","volume":"3","author":"Alves","year":"2004","journal-title":"Inf. Quart."},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2019.2900235"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1007\/s13389-021-00273-8"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS.2018.8618038"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/3460229"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/HOST55118.2023.10133626"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3102004"},{"key":"ref12","first-page":"719","article-title":"FLUSH+RELOAD: A high resolution, low noise, L3 cache side-channel attack","volume-title":"Proc. USENIX Secur. Symp.","author":"Yarom"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-SoC53125.2021.9607012"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.46586\/tches.v2020.i3.169-195"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2018.00049"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2021.3063306"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/3433210.3453112"},{"key":"ref18","first-page":"1073","article-title":"CURE: A security architecture with customizable and resilient enclaves","volume-title":"Proc. 30th USENIX Secur. Symp.","author":"Bahmani"},{"key":"ref19","article-title":"Secure platform for ICT systems rooted at the silicon manufacturing process","volume-title":"Proc. RISC-V Summit Eur., RISC-V Int.","author":"Andriamisaina"},{"key":"ref20","volume-title":"Arm-Based Chips Make Inroads With Apple, Amazon","author":"Fitch","year":"2023"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1007\/11605805_1"},{"key":"ref22","volume-title":"Programming ARM TrustZone Architecture on the Xilinx Zynq-7000 All Programmable SoC","year":"2014"},{"key":"ref23","volume-title":"AMBA AXI and ACE protocol specification","year":"2020"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2020.3001263"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2021.3074549"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/SOCC.2018.8618544"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2015.7372616"},{"issue":"11","key":"ref28","first-page":"1","article-title":"PROMISE: A programmable hardware monitor for secure execution in zero trust networks","volume":"42","author":"Singh","year":"2023","journal-title":"IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/AsianHOST59942.2023.10409311"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/SOCC.2009.5335664"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2009.19"},{"key":"ref32","article-title":"Software mitigations to Hedge AES against cache-based software side channel vulnerabilities","author":"Brickell","year":"2006","journal-title":"Preprint, IACR Cryptol. ePrint Arch"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.3047976"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/8919\/10857679\/10570040.pdf?arnumber=10570040","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,30]],"date-time":"2025-01-30T05:45:57Z","timestamp":1738215957000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10570040\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,2]]},"references-count":33,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2024.3413364","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2025,2]]}}}