{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,11]],"date-time":"2026-07-11T17:20:34Z","timestamp":1783790434900,"version":"3.55.0"},"reference-count":46,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"4","license":[{"start":{"date-parts":[[2025,4,1]],"date-time":"2025-04-01T00:00:00Z","timestamp":1743465600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,4,1]],"date-time":"2025-04-01T00:00:00Z","timestamp":1743465600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,4,1]],"date-time":"2025-04-01T00:00:00Z","timestamp":1743465600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2025,4]]},"DOI":"10.1109\/tcsi.2024.3483308","type":"journal-article","created":{"date-parts":[[2024,10,28]],"date-time":"2024-10-28T13:45:48Z","timestamp":1730123148000},"page":"1634-1647","source":"Crossref","is-referenced-by-count":3,"title":["Eyelet: A Cross-Mesh NoC-Based Fine-Grained Sparse CNN Accelerator for Spatio-Temporal Parallel Computing Optimization"],"prefix":"10.1109","volume":"72","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-4719-9278","authenticated-orcid":false,"given":"Bowen","family":"Yao","sequence":"first","affiliation":[{"name":"School of Electronics and Information Engineering, Harbin Institute of Technology, Harbin, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5834-9772","authenticated-orcid":false,"given":"Liansheng","family":"Liu","sequence":"additional","affiliation":[{"name":"School of Electronics and Information Engineering, Harbin Institute of Technology, Harbin, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3315-5581","authenticated-orcid":false,"given":"Yu","family":"Peng","sequence":"additional","affiliation":[{"name":"School of Electronics and Information Engineering, Harbin Institute of Technology, Harbin, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7424-1008","authenticated-orcid":false,"given":"Xiyuan","family":"Peng","sequence":"additional","affiliation":[{"name":"School of Electronics and Information Engineering, Harbin Institute of Technology, Harbin, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Rong","family":"Xu","sequence":"additional","affiliation":[{"name":"Shanghai Institute of Satellite Engineering, China Aerospace Science and Technology Corporation, Shanghai, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Heming","family":"Liu","sequence":"additional","affiliation":[{"name":"School of Electronics and Information Engineering, Harbin Institute of Technology, Harbin, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Haijun","family":"Zhang","sequence":"additional","affiliation":[{"name":"School of Electronics and Information Engineering, Harbin Institute of Technology, Harbin, China"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/3555802"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2023.3347417"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/s10489-022-04251-3"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.3390\/electronics10080895"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.3390\/computers12030060"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/3005348"},{"key":"ref7","article-title":"Deep compression: Compressing deep neural networks with pruning, trained quantization and Huffman coding","author":"Han","year":"2015","journal-title":"arXiv:1510.00149"},{"key":"ref8","article-title":"Rethinking the value of network pruning","author":"Liu","year":"2018","journal-title":"arXiv:1810.05270"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080246"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.4208\/cicp.110113.010813a"},{"key":"ref11","article-title":"Learning N:M fine-grained structured sparse neural networks from scratch","author":"Zhou","year":"2021","journal-title":"arXiv:2102.04010"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3074300"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2016.7783723"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/3140659.3080254"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2019.2910232"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/isca.2016.11"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2020.3002779"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2022.102567"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.3390\/mi14030528"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/JIOT.2024.3386832"},{"key":"ref21","article-title":"FlexNN: A dataflow-aware flexible deep learning accelerator for energy-efficient edge devices","author":"Raha","year":"2024","journal-title":"arXiv:2403.09026"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ICEngTechnol.2017.8308186"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TIM.2023.3341126"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/2554688.2554785"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ICCC47050.2019.9064309"},{"issue":"3","key":"ref26","doi-asserted-by":"crossref","first-page":"243","DOI":"10.1145\/3007787.3001163","article-title":"EIE: Efficient inference engine on compressed deep neural network","volume":"44","author":"Han","year":"2016","journal-title":"ACM SIGARCH Comput. Archit. News"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2022.3229767"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3066563"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3131581"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1002\/cpe.8011"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3066967"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2023.3320175"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1145\/2847263.2847276"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2688340"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/3020078.3021745"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.2978836"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/MC.1982.1653825"},{"issue":"4","key":"ref38","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/3460776","article-title":"Configurable multi-directional systolic array architecture for convolutional neural networks","volume":"18","author":"Xu","year":"2021","journal-title":"ACM Trans. Archit. Code Optim."},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2023.3241933"},{"issue":"4","key":"ref40","doi-asserted-by":"crossref","DOI":"10.1587\/elex.18.20210012","article-title":"An FPGA-based accelerator for deep neural network with novel reconfigurable architecture","volume":"18","author":"Jia","year":"2021","journal-title":"IEICE Electron. Exp."},{"issue":"3","key":"ref41","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/3284357","article-title":"NEURAGHE: Exploiting CPU-FPGA synergies for efficient and flexible CNN inference acceleration on Zynq SoCs","volume":"11","author":"Meloni","year":"2018","journal-title":"ACM Trans. Reconfigurable Technol. Syst."},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM51124.2021.00027"},{"key":"ref43","first-page":"237","article-title":"DPACS: Hardware accelerated dynamic neural network pruning through algorithm-architecture co-design","volume-title":"Proc. 28th ACM Int. Conf. Architectural Support Program. Lang. Operating Syst.","volume":"2","author":"Gao"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/OJCAS.2020.3047225"},{"key":"ref45","article-title":"RMNet: Equivalently removing residual connection from networks","author":"Meng","year":"2021","journal-title":"arXiv:2111.00687"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/TNNLS.2021.3055814"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/8919\/10944800\/10736682.pdf?arnumber=10736682","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,3,27]],"date-time":"2026-03-27T19:54:07Z","timestamp":1774641247000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10736682\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,4]]},"references-count":46,"journal-issue":{"issue":"4"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2024.3483308","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2025,4]]}}}