{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,11]],"date-time":"2026-03-11T16:35:20Z","timestamp":1773246920165,"version":"3.50.1"},"reference-count":83,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"8","license":[{"start":{"date-parts":[[2025,8,1]],"date-time":"2025-08-01T00:00:00Z","timestamp":1754006400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,8,1]],"date-time":"2025-08-01T00:00:00Z","timestamp":1754006400000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,8,1]],"date-time":"2025-08-01T00:00:00Z","timestamp":1754006400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,8,1]],"date-time":"2025-08-01T00:00:00Z","timestamp":1754006400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["IIS-2332744"],"award-info":[{"award-number":["IIS-2332744"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["ECCS-2328712"],"award-info":[{"award-number":["ECCS-2328712"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CCF-2328805"],"award-info":[{"award-number":["CCF-2328805"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CNS-2112562"],"award-info":[{"award-number":["CNS-2112562"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2025,8]]},"DOI":"10.1109\/tcsi.2025.3527309","type":"journal-article","created":{"date-parts":[[2025,1,15]],"date-time":"2025-01-15T15:30:40Z","timestamp":1736955040000},"page":"3971-3982","source":"Crossref","is-referenced-by-count":7,"title":["Advancements in Content-Addressable Memory (CAM) Circuits: State-of-the-Art, Applications, and Future Directions in the AI Domain"],"prefix":"10.1109","volume":"72","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-9146-370X","authenticated-orcid":false,"given":"Tergel","family":"Molom-Ochir","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2032-0960","authenticated-orcid":false,"given":"Brady","family":"Taylor","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3228-6544","authenticated-orcid":false,"given":"Hai","family":"Li","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1486-8412","authenticated-orcid":false,"given":"Yiran","family":"Chen","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/cicc.2003.1249424"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/2771937.2771938"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/INFCOMW.2014.6849275"},{"key":"ref4","first-page":"81","article-title":"An efficient content-addressable memory implementation using dynamic routing","volume-title":"Proc. 9th Annu. IEEE Symp. Field-Program. Custom Comput. Mach. (FCCM)","author":"James-Roxby"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/3613424.3614262"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2022.3158305"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ASP-DAC47756.2020.9045555"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/DAC56929.2023.10247937"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2023.3341830"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/3383669.3398279"},{"issue":"5","key":"ref11","first-page":"1","article-title":"A CAM (content addressable memory) architecture for codon matching in DNA sequences","volume":"10","author":"Lala","year":"2015","journal-title":"Current J. Appl. Sci. Technol."},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2023.3315829"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.3012860"},{"key":"ref14","article-title":"Hardware acceleration for database systems using content addressable memories","volume-title":"Proc. 1st Int. Workshop Data Manage. New Hardware (DaMoN)","author":"Bandi"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2021.3136576"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2023.3259940"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/LPT.2018.2817928"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2021.3131184"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1038\/s41467-022-33629-7"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/4.133160"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/78.134438"},{"key":"ref22","first-page":"1","article-title":"Fuse and mix: MACAM-enabled analog activation for energy-efficient neural acceleration","volume-title":"Proc. IEEE\/ACM Int. Conf. Comput. Aided Design (ICCAD)","author":"Zhu"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18074.2021.9586247"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1038\/s41467-021-25873-0"},{"key":"ref25","article-title":"RACE-IT: A reconfigurable analog CAM-crossbar engine for in-memory transformer acceleration","author":"Zhao","year":"2023","journal-title":"arXiv:2312.06532"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.23919\/DATE51398.2021.9474146"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.3389\/felec.2022.847069"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.837979"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/4.913745"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2274888"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/vlsic.2015.7231285"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TENCON.2008.4766746"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.806264"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2004.1358852"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2017009"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.914330"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1038\/s41467-020-15254-4"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1002\/aelm.202101198"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI59464.2023.10238633"},{"issue":"6","key":"ref40","doi-asserted-by":"crossref","first-page":"333","DOI":"10.1038\/s41928-018-0092-2","article-title":"In-memory computing with resistive switching devices","volume":"1","author":"Ielmini","year":"2018","journal-title":"Nature Electron."},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2158703"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2082270"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.838016"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2021.3061607"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3061260"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2022.3164756"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2013.6649109"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1049\/cds2.12057"},{"key":"ref49","first-page":"44","article-title":"A 3.14 \u03bcm2 4T-2MTJ-cell fully parallel TCAM based on nonvolatile logic-in-memory architecture","volume-title":"Proc. Symp. VLSI Circuits (VLSIC)","author":"Matsunaga"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2018.2889225"},{"key":"ref51","article-title":"Efficient analog CAM design","author":"Bazzi","year":"2022","journal-title":"arXiv:2203.02500"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2009.2037995"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2003.1221168"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2015.7063054"},{"key":"ref55","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2292055"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2016.7417944"},{"key":"ref57","doi-asserted-by":"publisher","DOI":"10.1109\/vlsic.2014.6858404"},{"key":"ref58","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2681458"},{"key":"ref59","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2016.2594827"},{"key":"ref60","doi-asserted-by":"publisher","DOI":"10.1143\/JJAP.50.063004"},{"key":"ref61","doi-asserted-by":"publisher","DOI":"10.1143\/JJAP.51.02BM06"},{"key":"ref62","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2007735"},{"key":"ref63","first-page":"298","article-title":"Fully parallel 6T-2MTJ nonvolatile TCAM with single-transistor-based self match-line discharge control","volume-title":"IEEE Symp. VLSI Circuits Dig. Tech. Papers","author":"Matsunaga"},{"key":"ref64","doi-asserted-by":"publisher","DOI":"10.1145\/2966986.2967060"},{"key":"ref65","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2017.7927219"},{"issue":"7","key":"ref66","doi-asserted-by":"crossref","first-page":"2785","DOI":"10.1109\/TED.2020.2994896","article-title":"FeCAM: A universal compact digital and analog content addressable memory using ferroelectric","volume":"67","author":"Yin","year":"2020","journal-title":"IEEE Trans. Electron Devices"},{"issue":"11","key":"ref67","doi-asserted-by":"crossref","first-page":"521","DOI":"10.1038\/s41928-019-0321-3","article-title":"Ferroelectric ternary content-addressable memory for one-shot learning","volume":"2","author":"Ni","year":"2019","journal-title":"Nat. Electron."},{"key":"ref68","doi-asserted-by":"publisher","DOI":"10.1109\/ANTS.2013.6802844"},{"key":"ref69","doi-asserted-by":"publisher","DOI":"10.1109\/ANCS.2015.7110130"},{"key":"ref70","doi-asserted-by":"publisher","DOI":"10.1145\/2934583.2934595"},{"key":"ref71","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2017.7927141"},{"key":"ref72","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2018.8465903"},{"key":"ref73","doi-asserted-by":"publisher","DOI":"10.1002\/adma.202003437"},{"key":"ref74","first-page":"29","article-title":"HW-BCP: A custom hardware accelerator for sat suitable for single chip implementation for large benchmarks","volume-title":"Proc. 26th Asia South Pacific Design Autom. Conf. (ASP-DAC)","author":"Park"},{"key":"ref75","doi-asserted-by":"publisher","DOI":"10.1126\/sciadv.adk8471"},{"key":"ref76","doi-asserted-by":"publisher","DOI":"10.1109\/2.30732"},{"key":"ref77","doi-asserted-by":"publisher","DOI":"10.15760\/etd.6060"},{"issue":"7","key":"ref78","doi-asserted-by":"crossref","first-page":"563","DOI":"10.1016\/j.mejo.2015.03.020","article-title":"TCAM\/CAM-QCA: (Ternary) content addressable memory using quantum-dot cellular automata","volume":"46","author":"Sardinha","year":"2015","journal-title":"Microelectron. J."},{"key":"ref79","doi-asserted-by":"crossref","first-page":"140","DOI":"10.1016\/j.mee.2016.06.009","article-title":"Content addressable memory cell in quantum-dot cellular automata","volume":"163","author":"Heikalabad","year":"2016","journal-title":"Microelectron. Eng."},{"key":"ref80","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2005.853449"},{"key":"ref81","doi-asserted-by":"publisher","DOI":"10.1109\/dft.2010.56"},{"key":"ref82","doi-asserted-by":"publisher","DOI":"10.1109\/IEMENTech53263.2021.9614696"},{"key":"ref83","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2024.3386065"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielam\/8919\/11099062\/10843122-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/8919\/11099062\/10843122.pdf?arnumber=10843122","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,7,30]],"date-time":"2025-07-30T05:08:09Z","timestamp":1753852089000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10843122\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,8]]},"references-count":83,"journal-issue":{"issue":"8"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2025.3527309","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2025,8]]}}}