{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,5]],"date-time":"2026-06-05T05:01:45Z","timestamp":1780635705198,"version":"3.54.1"},"reference-count":39,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"10","license":[{"start":{"date-parts":[[2025,10,1]],"date-time":"2025-10-01T00:00:00Z","timestamp":1759276800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,10,1]],"date-time":"2025-10-01T00:00:00Z","timestamp":1759276800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,10,1]],"date-time":"2025-10-01T00:00:00Z","timestamp":1759276800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100000266","name":"Engineering and Physical Sciences Research Council (EPSRC) Functional Oxide Reconfigurable Technologies (FORTE) FORTE Program","doi-asserted-by":"publisher","award":["EP\/R024642\/2"],"award-info":[{"award-number":["EP\/R024642\/2"]}],"id":[{"id":"10.13039\/501100000266","id-type":"DOI","asserted-by":"publisher"}]},{"name":"EPSRC Low-Power, High-Speed, Adaptable Processing-In-Sensing Capability (ProSensing) Project","award":["EP\/Y030176\/1"],"award-info":[{"award-number":["EP\/Y030176\/1"]}]},{"DOI":"10.13039\/501100000287","name":"Royal Academy of Engineering Chair in Emerging Technologies","doi-asserted-by":"publisher","award":["CiET1819\/2\/93"],"award-info":[{"award-number":["CiET1819\/2\/93"]}],"id":[{"id":"10.13039\/501100000287","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2025,10]]},"DOI":"10.1109\/tcsi.2025.3545257","type":"journal-article","created":{"date-parts":[[2025,2,28]],"date-time":"2025-02-28T14:00:03Z","timestamp":1740751203000},"page":"5545-5558","source":"Crossref","is-referenced-by-count":3,"title":["A 9T4R RRAM-Based ACAM for Analogue Template Matching at the Edge"],"prefix":"10.1109","volume":"72","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-9203-2557","authenticated-orcid":false,"given":"Georgios","family":"Papandroulidakis","sequence":"first","affiliation":[{"name":"Centre for Electronics Frontiers (CEF), Institute for Integrated Micro and Nano Systems, The University of Edinburgh, Edinburgh, U.K."}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6678-6283","authenticated-orcid":false,"given":"Shady","family":"Agwa","sequence":"additional","affiliation":[{"name":"Centre for Electronics Frontiers (CEF), Institute for Integrated Micro and Nano Systems, The University of Edinburgh, Edinburgh, U.K."}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0007-8152-5069","authenticated-orcid":false,"given":"Ahmet","family":"Cirakoglu","sequence":"additional","affiliation":[{"name":"Centre for Electronics Frontiers (CEF), Institute for Integrated Micro and Nano Systems, The University of Edinburgh, Edinburgh, U.K."}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6267-6909","authenticated-orcid":false,"given":"Themis","family":"Prodromakis","sequence":"additional","affiliation":[{"name":"Centre for Electronics Frontiers (CEF), Institute for Integrated Micro and Nano Systems, The University of Edinburgh, Edinburgh, U.K."}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MEMRISYS.2015.7378391"},{"issue":"1","key":"ref2","first-page":"1994","article-title":"The memory wall and the CMOS end-point","volume":"23","author":"Wilkes","year":"1995","journal-title":"ACM SIGARCH Comput. Archit. News"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/977091.977115"},{"issue":"1","key":"ref4","doi-asserted-by":"crossref","first-page":"22","DOI":"10.1038\/s41928-017-0006-8","article-title":"The future of electronics based on memristive systems","volume":"1","author":"Zidan","year":"2018","journal-title":"Nature Electron."},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISSMDBS.2008.4575060"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/tcsi.2021.3100266"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/biocas49922.2021.9645008"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"102","DOI":"10.1016\/j.copbio.2021.10.001","article-title":"Implantable brain machine interfaces: First-in-human studies, technology challenges and trends","volume":"72","author":"Rapeaux","year":"2021","journal-title":"Current Opinion Biotechnol."},{"issue":"1","key":"ref9","doi-asserted-by":"crossref","first-page":"556","DOI":"10.1038\/s41467-024-44723-3","article-title":"Neuromorphic hardware for somatosensory neuroprostheses","volume":"15","author":"Donati","year":"2024","journal-title":"Nature Commun."},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-019-0321-3"},{"key":"ref11","article-title":"OE-CAM: A hybrid opto-electronic content addressable memory","author":"Alkabani","year":"2019","journal-title":"arXiv:1912.02220"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2010.2049867"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2020.2994896"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1002\/adma.202003437"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2019.2936239"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1016\/j.ins.2020.05.038"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TNNLS.2019.2899344"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1088\/0268-1242\/29\/10\/104001"},{"issue":"6","key":"ref19","doi-asserted-by":"crossref","first-page":"333","DOI":"10.1038\/s41928-018-0092-2","article-title":"In-memory computing with resistive switching devices","volume":"1","author":"Ielmini","year":"2018","journal-title":"Nature Electron."},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1063\/1.5042413"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1038\/s41565-020-0655-z"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1038\/s41598-017-17785-1"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1103\/physrevapplied.13.054049"},{"key":"ref24","first-page":"1","article-title":"Regular expression matching with memristor TCAMs for network security","volume-title":"Proc. IEEE\/ACM Int. Symp. Nanosc. Archit. (NANOARCH)","author":"Graves"},{"issue":"1","key":"ref25","doi-asserted-by":"crossref","first-page":"16","DOI":"10.1038\/s41467-018-04624-8","article-title":"Seamlessly fused digital-analogue reconfigurable computing using memristors","volume":"9","author":"Serb","year":"2018","journal-title":"Nature Commun."},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-96552-4_1"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1038\/s41467-021-25873-0"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1002\/aelm.202101198"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2016.2636294"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2017.2649547"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1038\/s41467-020-15254-4"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS46773.2023.10181451"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3122343"},{"key":"ref34","article-title":"A compact verilog\u2014A ReRAM switching model","author":"Messaris","year":"2017","journal-title":"arXiv:1703.01167"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/BIOCAS.2017.8325145"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/A-SSCC47793.2019.9056974"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2681458"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2023.3271308"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2822703"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/8919\/11174046\/10908372.pdf?arnumber=10908372","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,10,2]],"date-time":"2025-10-02T04:32:36Z","timestamp":1759379556000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10908372\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,10]]},"references-count":39,"journal-issue":{"issue":"10"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2025.3545257","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2025,10]]}}}