{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,2]],"date-time":"2025-08-02T19:19:14Z","timestamp":1754162354848,"version":"3.41.2"},"reference-count":16,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"8","license":[{"start":{"date-parts":[[2025,8,1]],"date-time":"2025-08-01T00:00:00Z","timestamp":1754006400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,8,1]],"date-time":"2025-08-01T00:00:00Z","timestamp":1754006400000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,8,1]],"date-time":"2025-08-01T00:00:00Z","timestamp":1754006400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,8,1]],"date-time":"2025-08-01T00:00:00Z","timestamp":1754006400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["ECCS-2123625"],"award-info":[{"award-number":["ECCS-2123625"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2025,8]]},"DOI":"10.1109\/tcsi.2025.3557837","type":"journal-article","created":{"date-parts":[[2025,4,15]],"date-time":"2025-04-15T13:40:14Z","timestamp":1744724414000},"page":"3791-3801","source":"Crossref","is-referenced-by-count":0,"title":["A Fractional Spur Cancellation Technique for Fractional-N Frequency Synthesizers Enabled by Dual Loop Phase Clamping"],"prefix":"10.1109","volume":"72","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-3607-8195","authenticated-orcid":false,"given":"Tanwei","family":"Yan","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering, Texas A&#x0026;M University, College Station, TX, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6540-3060","authenticated-orcid":false,"given":"Junning","family":"Jiang","sequence":"additional","affiliation":[{"name":"Nvidia Corporation, Santa Clara, CA, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7960-0177","authenticated-orcid":false,"given":"Jose","family":"Silva-Martinez","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Texas A&#x0026;M University, College Station, TX, USA"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1109\/comst.2023.3249835"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1109\/CICC.2017.7993678"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1109\/isscc.2019.8662327"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1109\/RFIC51843.2021.9490444"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1109\/jssc.2019.2950154"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1109\/isscc19947.2020.9063094"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.1109\/ISSCC42615.2023.10067719"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1109\/ISSCC42615.2023.10067342"},{"doi-asserted-by":"publisher","key":"ref9","DOI":"10.1109\/ISSCC.2018.8310350"},{"doi-asserted-by":"publisher","key":"ref10","DOI":"10.1109\/isscc49657.2024.10454284"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.1109\/MWSCAS60917.2024.10658953"},{"doi-asserted-by":"publisher","key":"ref12","DOI":"10.1109\/jssc.2008.2005716"},{"doi-asserted-by":"publisher","key":"ref13","DOI":"10.1109\/tcsii.2006.879100"},{"doi-asserted-by":"publisher","key":"ref14","DOI":"10.1109\/tcsi.2004.829308"},{"doi-asserted-by":"publisher","key":"ref15","DOI":"10.1109\/isscc.2017.7870441"},{"doi-asserted-by":"publisher","key":"ref16","DOI":"10.1109\/jssc.2016.2596770"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielam\/8919\/11099062\/10965788-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/8919\/11099062\/10965788.pdf?arnumber=10965788","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,7,30]],"date-time":"2025-07-30T05:13:42Z","timestamp":1753852422000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10965788\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,8]]},"references-count":16,"journal-issue":{"issue":"8"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2025.3557837","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"type":"print","value":"1549-8328"},{"type":"electronic","value":"1558-0806"}],"subject":[],"published":{"date-parts":[[2025,8]]}}}