{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,27]],"date-time":"2026-03-27T20:59:35Z","timestamp":1774645175151,"version":"3.50.1"},"reference-count":52,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2026,1,1]],"date-time":"2026-01-01T00:00:00Z","timestamp":1767225600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2026,1,1]],"date-time":"2026-01-01T00:00:00Z","timestamp":1767225600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,1,1]],"date-time":"2026-01-01T00:00:00Z","timestamp":1767225600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"European Commission (EC) Horizon 2020 Research and Innovation Programme","award":["QUEFORMAL 829035"],"award-info":[{"award-number":["QUEFORMAL 829035"]}]},{"name":"European Commission (EC) Horizon 2020 Research and Innovation Programme","award":["AUTOCAPSULE 952118"],"award-info":[{"award-number":["AUTOCAPSULE 952118"]}]},{"name":"Italian Ministry of University and Research (MUR) through the Forelab Project of the \u201cDipartimenti di Eccellenza\u201d Programme"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2026,1]]},"DOI":"10.1109\/tcsi.2025.3599010","type":"journal-article","created":{"date-parts":[[2025,8,28]],"date-time":"2025-08-28T18:12:07Z","timestamp":1756404727000},"page":"3-16","source":"Crossref","is-referenced-by-count":0,"title":["Temperature-Resilient Analog Neuromorphic Chip in Single-Polysilicon CMOS Technology"],"prefix":"10.1109","volume":"73","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-2527-713X","authenticated-orcid":false,"given":"Tommaso","family":"Rizzo","sequence":"first","affiliation":[{"name":"Quantavis s.r.l., Pisa, Italy"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6984-1137","authenticated-orcid":false,"given":"Sebastiano","family":"Strangio","sequence":"additional","affiliation":[{"name":"Dipartimento di Ingegneria dell’Informazione (DII), Università di Pisa, Pisa, Italy"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7242-6228","authenticated-orcid":false,"given":"Alessandro","family":"Catania","sequence":"additional","affiliation":[{"name":"Dipartimento di Ingegneria dell’Informazione (DII), Università di Pisa, Pisa, Italy"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3375-1647","authenticated-orcid":false,"given":"Giuseppe","family":"Iannaccone","sequence":"additional","affiliation":[{"name":"Dipartimento di Ingegneria dell’Informazione (DII), Università di Pisa, Pisa, Italy"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-018-0059-3"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1063\/5.0067352"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1088\/1361-6528\/aba70f"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1088\/2634-4386\/ac4a83"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1126\/science.ade3483"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-020-0435-7"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1038\/s42254-020-0208-2"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/MED.2023.3296084"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-023-01053-4"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TNNLS.2017.2778940"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-019-0331-1"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2020.3037017"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-022-00878-9"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2022.3172488"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2018.2871057"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1038\/s41586-021-04362-w"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1038\/s43588-021-00184-y"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-023-00977-1"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1063\/5.0136403"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2019.8702206"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1038\/s41598-022-11199-4"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1126\/sciadv.abm8537"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1088\/2634-4386\/ac4918"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2023.3295337"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS48203.2023.10117810"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1021\/acsnano.1c07065"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-023-01064-1"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1038\/s41467-017-02337-y"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1002\/adma.202205381"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-022-00795-x"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1038\/s41586-022-04992-8"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1126\/sciadv.aay2378"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1126\/sciadv.adj2908"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.23919\/VLSICircuits52068.2021.9492362"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-023-01010-1"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1038\/s41586-023-05759-5"},{"key":"ref37","volume-title":"Memristor using parallel asymmetrical transistors having shared floating gate and diode","author":"Yakov Roizin","year":"2016"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM45625.2022.10019367"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2010.5536998"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2017.7993628"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2017.8050290"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/NVMSA63038.2024.10693660"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS46773.2023.10181619"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2023.3321643"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/ETS61313.2024.10567960"},{"key":"ref46","volume-title":"The MNIST Database of Handwritten Digits","year":"2023"},{"key":"ref47","volume-title":"Analog Devices MT-003 Tutorial: Understand SINAD, ENOB, SNR, THD, THD + N, and SFDR","author":"Kester","year":"2025"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/EDL.1985.26114"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2019.2891688"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/JXCDC.2020.2981048"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM19574.2021.9720519"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1109\/AICAS48895.2020.9074003"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/8919\/11345139\/11143611.pdf?arnumber=11143611","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,3,27]],"date-time":"2026-03-27T19:54:18Z","timestamp":1774641258000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11143611\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,1]]},"references-count":52,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2025.3599010","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2026,1]]}}}