{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,4]],"date-time":"2026-05-04T10:26:27Z","timestamp":1777890387473,"version":"3.51.4"},"reference-count":34,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2026,5,1]],"date-time":"2026-05-01T00:00:00Z","timestamp":1777593600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2026,5,1]],"date-time":"2026-05-01T00:00:00Z","timestamp":1777593600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,5,1]],"date-time":"2026-05-01T00:00:00Z","timestamp":1777593600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"National Key Research and Development Program of China","award":["2022YFB4401900"],"award-info":[{"award-number":["2022YFB4401900"]}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["U2441246"],"award-info":[{"award-number":["U2441246"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62434007"],"award-info":[{"award-number":["62434007"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62227816"],"award-info":[{"award-number":["62227816"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2026,5]]},"DOI":"10.1109\/tcsi.2025.3637601","type":"journal-article","created":{"date-parts":[[2025,12,17]],"date-time":"2025-12-17T18:50:28Z","timestamp":1765997428000},"page":"3081-3090","source":"Crossref","is-referenced-by-count":0,"title":["A 65.5-dB SNDR 100-MS\/s Pipelined-SAR ADC With Nested Negative-C and Dynamic Auto-Zeroing Residue Amplifier Achieving\u2006 \u2264 2.2-dB \u0394SNDR Over \u221220 \u2006\u00b0C to 125\u2006 \u00b0C"],"prefix":"10.1109","volume":"73","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-4566-1569","authenticated-orcid":false,"given":"Haolin","family":"Han","sequence":"first","affiliation":[{"name":"Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9942-0069","authenticated-orcid":false,"given":"Shubin","family":"Liu","sequence":"additional","affiliation":[{"name":"Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2586-3772","authenticated-orcid":false,"given":"Yi","family":"Shen","sequence":"additional","affiliation":[{"name":"Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6609-9486","authenticated-orcid":false,"given":"Hongzhi","family":"Liang","sequence":"additional","affiliation":[{"name":"Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7764-1928","authenticated-orcid":false,"given":"Zhangming","family":"Zhu","sequence":"additional","affiliation":[{"name":"Key Laboratory of Analog Integrated Circuits, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2879942"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2075310"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2023.3290119"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2023.3272640"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2022.3222162"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2211695"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2907401"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2010.2090159"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2548486"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2591822"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/cicc.2009.5280857"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2024.3513435"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2006312"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2024.3422671"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.3015863"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2948170"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2732731"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2938450"},{"key":"ref19","first-page":"1","article-title":"A 40 nm CMOS 12b 200MS\/s single-amplifier dual-residue pipelined-SAR ADC","volume-title":"Symp. VLSI Technol. Circuits Dig. Tech. Papers (VLSI-T)","author":"Seo"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2023.3235521"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/isscc.2017.7870469"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2384025"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC55480.2022.9911468"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/A-SSCC58667.2023.10347949"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/OJSSCS.2024.3513255"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.3023882"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC49657.2024.10454350"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2076430"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42615.2023.10067687"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.892169"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2747758"},{"key":"ref32","volume-title":"Design of Analog CMOS Integrated Circuits","author":"Razavi","year":"2017"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2619677"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2025.3551156"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/8919\/11500576\/11302873.pdf?arnumber=11302873","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,5,1]],"date-time":"2026-05-01T05:36:42Z","timestamp":1777613802000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11302873\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,5]]},"references-count":34,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2025.3637601","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2026,5]]}}}