{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,7,4]],"date-time":"2024-07-04T12:35:24Z","timestamp":1720096524421},"reference-count":18,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"11","license":[{"start":{"date-parts":[[2011,11,1]],"date-time":"2011-11-01T00:00:00Z","timestamp":1320105600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. II"],"published-print":{"date-parts":[[2011,11]]},"DOI":"10.1109\/tcsii.2011.2168015","type":"journal-article","created":{"date-parts":[[2011,11,17]],"date-time":"2011-11-17T19:31:25Z","timestamp":1321558285000},"page":"734-738","source":"Crossref","is-referenced-by-count":28,"title":["A Two-Stage ADC Architecture With VCO-Based Second Stage"],"prefix":"10.1109","volume":"58","author":[{"given":"A. K.","family":"Gupta","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"K.","family":"Nagaraj","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"T. R.","family":"Viswanathan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","first-page":"168","article-title":"A 9b 14 <ref_formula><tex Notation=\"TeX\">$\\mu\\hbox{W}$<\/tex><\/ref_formula> 0.06 <ref_formula><tex Notation=\"TeX\">$\\hbox{mm}^{2}$ <\/tex><\/ref_formula> PPM ADC in 90 nm digital CMOS","author":"naraghi","year":"2009","journal-title":"Proc ISSCC Dig Tech Papers"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2009.2020947"},{"key":"ref12","first-page":"271","article-title":"A 0.0027- <ref_formula><tex Notation=\"TeX\">$\\hbox{mm}^{2}$<\/tex><\/ref_formula> 9.5-bit 50-MS\/s all-digital A\/D converter TAD in 65-nm digital CMOS","author":"watanabe","year":"2009","journal-title":"Proc ICECS IEEE Int Conf"},{"key":"ref13","doi-asserted-by":"crossref","first-page":"18","DOI":"10.1109\/TCSI.2009.2018928","article-title":"Analysis and design of voltage-controlled oscillator based analog-to-digital converter","volume":"57","author":"kim","year":"2010","journal-title":"IEEE Trans Circuits Syst I Reg Papers"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.917500"},{"key":"ref15","first-page":"170","article-title":"A 0.13 <ref_formula><tex Notation=\"TeX\">$\\mu\\hbox{m}$<\/tex><\/ref_formula> CMOS 78 dB SNDR 87 mW 20 MHz BW CT <ref_formula><tex Notation=\"TeX\">$\\Delta\\Sigma$<\/tex><\/ref_formula> ADC with VCO-based integrator and quantizer","author":"park","year":"2009","journal-title":"Proc IEEE ISSCC Dig Tech Papers"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2073193"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1049\/el.2009.0744"},{"key":"ref18","first-page":"2841","article-title":"A highly linear CMOS current-controlled oscillator using a novel frequency detector","author":"cui","year":"2008","journal-title":"Proc IEEE Int Symp ISCAS"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2008.4585957"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2004.839534"},{"key":"ref6","first-page":"165","article-title":"A 10 mW 9.7ENOB 80 MSPS pipeline ADC in 65 nm CMOS process without any special mask requirement and with single 1.3 V supply","author":"das","year":"2009","journal-title":"Proc IEEE CICC"},{"key":"ref5","first-page":"165","article-title":"A 65 nm CMOS 1.2 V 12b 30 MS\/s ADC with capacitive reference scaling","author":"lee","year":"2008","journal-title":"Proc IEEE CICC"},{"key":"ref8","first-page":"249","article-title":"A 10-bit pipeline ADC using 40-dB opamps and calibrated customized references","author":"chen","year":"2007","journal-title":"Proc 7th Int ASICON"},{"key":"ref7","first-page":"239","article-title":"A 12b 50 MS\/s 3.5 mW SAR assisted 2-stage pipeline ADC","author":"lee","year":"2010","journal-title":"Proc IEEE Symp VLSI"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2006.880034"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/82.168943"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1986.1052570"}],"container-title":["IEEE Transactions on Circuits and Systems II: Express Briefs"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8920\/6083463\/06080717.pdf?arnumber=6080717","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,10]],"date-time":"2021-10-10T23:47:29Z","timestamp":1633909649000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6080717\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,11]]},"references-count":18,"journal-issue":{"issue":"11"},"URL":"https:\/\/doi.org\/10.1109\/tcsii.2011.2168015","relation":{},"ISSN":["1549-7747"],"issn-type":[{"value":"1549-7747","type":"print"}],"subject":[],"published":{"date-parts":[[2011,11]]}}}