{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,9]],"date-time":"2025-09-09T21:29:22Z","timestamp":1757453362882},"reference-count":15,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2012,3,1]],"date-time":"2012-03-01T00:00:00Z","timestamp":1330560000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. II"],"published-print":{"date-parts":[[2012,3]]},"DOI":"10.1109\/tcsii.2012.2184372","type":"journal-article","created":{"date-parts":[[2012,2,15]],"date-time":"2012-02-15T22:02:49Z","timestamp":1329343369000},"page":"178-182","source":"Crossref","is-referenced-by-count":15,"title":["New Design of 2 $\\times$ VDD-Tolerant Power-Rail ESD Clamp Circuit for Mixed-Voltage I\/O Buffers in 65-nm CMOS Technology"],"prefix":"10.1109","volume":"59","author":[{"given":"Chih-Ting","family":"Yeh","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ming-Dou","family":"Ker","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","year":"0","journal-title":"BSIM Model Berkeley Short-Channel IGFET Model"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.814434"},{"key":"ref12","doi-asserted-by":"crossref","DOI":"10.1002\/9780470824092","author":"ker","year":"2009","journal-title":"Transient-Induced Latchup in CMOS Integrated Circuits"},{"key":"ref13","year":"2001","journal-title":"Electrostatic Discharge Sensitivity TestingHuman Body Model (HBM)Component Level ESD Association Standard"},{"key":"ref14","first-page":"49","article-title":"Transmission line pulsing techniques for circuit modeling of ESD phenomena","author":"maloney","year":"1985","journal-title":"Proc EOS\/ESD Symp"},{"key":"ref15","year":"1999","journal-title":"Electrostatic Discharge Sensitivity TestingMachine Model (MM)Component Level ESD Association Standard"},{"key":"ref4","author":"dabral","year":"1998","journal-title":"Basic ESD and I\/O Designs"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.881546"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2005.856040"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/RELPHY.1997.584255"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2010.2046457"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2008.920972"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/4.799855"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/4.391124"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2010.2049072"}],"container-title":["IEEE Transactions on Circuits and Systems II: Express Briefs"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8920\/6169168\/06153054.pdf?arnumber=6153054","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,10]],"date-time":"2021-10-10T23:53:19Z","timestamp":1633909999000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6153054\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,3]]},"references-count":15,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/tcsii.2012.2184372","relation":{},"ISSN":["1549-7747","1558-3791"],"issn-type":[{"value":"1549-7747","type":"print"},{"value":"1558-3791","type":"electronic"}],"subject":[],"published":{"date-parts":[[2012,3]]}}}