{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,27]],"date-time":"2026-02-27T15:29:00Z","timestamp":1772206140316,"version":"3.50.1"},"reference-count":10,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2014,7,1]],"date-time":"2014-07-01T00:00:00Z","timestamp":1404172800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100001321","name":"National Research Foundation (NRF)","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100001321","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Ministry of Education, Science and Technology (MEST)","award":["20120005294"],"award-info":[{"award-number":["20120005294"]}]},{"name":"Information Technology (IT) research and development program of Ministry of Knowledge Economy (MKE)","award":["10039159"],"award-info":[{"award-number":["10039159"]}]},{"name":"Information Technology Research Center (ITRC)","award":["NIPA-2013-H0301-13-1007"],"award-info":[{"award-number":["NIPA-2013-H0301-13-1007"]}]},{"name":"Integrated Circuit Design Education Center (IDEC)"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. II"],"published-print":{"date-parts":[[2014,7]]},"DOI":"10.1109\/tcsii.2014.2328800","type":"journal-article","created":{"date-parts":[[2014,6,4]],"date-time":"2014-06-04T18:04:07Z","timestamp":1401905047000},"page":"481-485","source":"Crossref","is-referenced-by-count":26,"title":["Analysis of an Open-Loop Time Amplifier With a Time Gain Determined by the Ratio of Bias Current"],"prefix":"10.1109","volume":"61","author":[{"given":"Hye-Jung","family":"Kwon","sequence":"first","affiliation":[]},{"given":"Jae-Seung","family":"Lee","sequence":"additional","affiliation":[]},{"given":"Byungsub","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Jae-Yoon","family":"Sim","sequence":"additional","affiliation":[]},{"given":"Hong-June","family":"Park","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.5573\/JSTS.2012.12.4.411"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.917405"},{"key":"ref10","year":"0","journal-title":"BSIM4 6 Technical Manual"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1587\/transele.E93.C.303"},{"key":"ref5","first-page":"482","article-title":"A 1 GHz ADPLL with a 1.25 ps minimum-resolution sub-exponent TDC in 0.18 $\\mu\\hbox{m}$ CMOS","author":"lee","year":"0","journal-title":"Proc IEEE ISSCC"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2010.2043382"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2011.6123579"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/4.823449"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.876206"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2012363"}],"container-title":["IEEE Transactions on Circuits and Systems II: Express Briefs"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8920\/6856260\/06825871.pdf?arnumber=6825871","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:16:57Z","timestamp":1642004217000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6825871\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,7]]},"references-count":10,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/tcsii.2014.2328800","relation":{},"ISSN":["1549-7747","1558-3791"],"issn-type":[{"value":"1549-7747","type":"print"},{"value":"1558-3791","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014,7]]}}}