{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T19:58:35Z","timestamp":1740167915695,"version":"3.37.3"},"reference-count":13,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2015,5,1]],"date-time":"2015-05-01T00:00:00Z","timestamp":1430438400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/100002418","name":"Intel Corporation","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100002418","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000185","name":"Defense Advanced Research Projects Agency (DARPA)","doi-asserted-by":"publisher","award":["HR0011-13-2-0006"],"award-info":[{"award-number":["HR0011-13-2-0006"]}],"id":[{"id":"10.13039\/100000185","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. II"],"published-print":{"date-parts":[[2015,5]]},"DOI":"10.1109\/tcsii.2014.2386251","type":"journal-article","created":{"date-parts":[[2014,12,25]],"date-time":"2014-12-25T14:33:45Z","timestamp":1419518025000},"page":"471-475","source":"Crossref","is-referenced-by-count":2,"title":["An FPGA-Based Transient Error Simulator for Resilient Circuit and System Design and Evaluation"],"prefix":"10.1109","volume":"62","author":[{"given":"Chia-Hsiang","family":"Chen","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shiming","family":"Song","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zhengya","family":"Zhang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2237972"},{"journal-title":"BEE3 Revitalizing Computer Architecture Research","year":"2009","author":"davis","key":"ref11"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2010.5654317"},{"journal-title":"Alpha Architecture Reference Manual","year":"1998","author":"sites","key":"ref13"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2007145"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2007.22"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2006.889115"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2089657"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/s10836-008-5081-3"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2007.895549"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2006.887832"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"93","DOI":"10.1145\/1629911.1629940","article-title":"design perspectives on 22nm cmos and beyond","author":"borkar","year":"2009","journal-title":"2009 46th ACM\/IEEE Design Automation Conference dac"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2010.262"}],"container-title":["IEEE Transactions on Circuits and Systems II: Express Briefs"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8920\/7094329\/06998847.pdf?arnumber=6998847","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T11:41:07Z","timestamp":1641987667000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6998847\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,5]]},"references-count":13,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/tcsii.2014.2386251","relation":{},"ISSN":["1549-7747","1558-3791"],"issn-type":[{"type":"print","value":"1549-7747"},{"type":"electronic","value":"1558-3791"}],"subject":[],"published":{"date-parts":[[2015,5]]}}}