{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,28]],"date-time":"2026-03-28T17:50:25Z","timestamp":1774720225889,"version":"3.50.1"},"reference-count":15,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"11","license":[{"start":{"date-parts":[[2016,11,1]],"date-time":"2016-11-01T00:00:00Z","timestamp":1477958400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. II"],"published-print":{"date-parts":[[2016,11]]},"DOI":"10.1109\/tcsii.2016.2548238","type":"journal-article","created":{"date-parts":[[2016,3,29]],"date-time":"2016-03-29T18:29:48Z","timestamp":1459276188000},"page":"1064-1068","source":"Crossref","is-referenced-by-count":9,"title":["Design Techniques for a 30-ns Access Time 1.5-V 200-KB Embedded EEPROM Memory"],"prefix":"10.1109","volume":"63","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-5224-7860","authenticated-orcid":false,"given":"Yiran","family":"Xu","sequence":"first","affiliation":[]},{"given":"Jian","family":"Hu","sequence":"additional","affiliation":[]},{"given":"Jun","family":"Xiao","sequence":"additional","affiliation":[]},{"given":"Guangjun","family":"Yang","sequence":"additional","affiliation":[]},{"given":"Weiran","family":"Kong","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2014.2326975"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1982.1051827"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/4.871314"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.845564"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2012.6176594"},{"key":"ref15","first-page":"1","article-title":"Byte alterable embedded EEPROM with B4-HE architecture achieving 10 usec programming and 57F2 cell size","author":"shukuri","year":"0","journal-title":"Proc IEEE IMW"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.886523"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2013.2271498"},{"key":"ref6","first-page":"200","article-title":"A 4 Mb embedded SLC resistive-RAM macro with 7.2 ns read–write random-access time and 160 ns \nMLC-access capability","author":"sheu","year":"0","journal-title":"Proc IEEE ISSCC Dig Tech Papers"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2015.7062962"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2003.1173055"},{"key":"ref7","first-page":"1516","article-title":"Key design techniques of a 40 ns 16 Kbit embedded EEPROM memory","volume":"2","author":"xu","year":"0","journal-title":"Proc ICCCAS"},{"key":"ref2","author":"park","year":"2002","journal-title":"Integrated circuit having an EEPROM and flash EPROM"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2011.6131521"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2007.907265"}],"container-title":["IEEE Transactions on Circuits and Systems II: Express Briefs"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8920\/7723946\/07442853.pdf?arnumber=7442853","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T11:40:02Z","timestamp":1641987602000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7442853\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,11]]},"references-count":15,"journal-issue":{"issue":"11"},"URL":"https:\/\/doi.org\/10.1109\/tcsii.2016.2548238","relation":{},"ISSN":["1549-7747","1558-3791"],"issn-type":[{"value":"1549-7747","type":"print"},{"value":"1558-3791","type":"electronic"}],"subject":[],"published":{"date-parts":[[2016,11]]}}}