{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,18]],"date-time":"2026-03-18T13:49:04Z","timestamp":1773841744489,"version":"3.50.1"},"reference-count":13,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2017,5,1]],"date-time":"2017-05-01T00:00:00Z","timestamp":1493596800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2017,5,1]],"date-time":"2017-05-01T00:00:00Z","timestamp":1493596800000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2017,5,1]],"date-time":"2017-05-01T00:00:00Z","timestamp":1493596800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2017,5,1]],"date-time":"2017-05-01T00:00:00Z","timestamp":1493596800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CCF1421467"],"award-info":[{"award-number":["CCF1421467"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. II"],"published-print":{"date-parts":[[2017,5]]},"DOI":"10.1109\/tcsii.2016.2581587","type":"journal-article","created":{"date-parts":[[2016,6,15]],"date-time":"2016-06-15T19:35:13Z","timestamp":1466019313000},"page":"580-584","source":"Crossref","is-referenced-by-count":6,"title":["An Efficient Eligible Error Locator Polynomial Searching Algorithm and Hardware Architecture for One-Pass Chase Decoding of BCH Codes"],"prefix":"10.1109","volume":"64","author":[{"given":"Nan","family":"Zheng","sequence":"first","affiliation":[]},{"given":"Pinaki","family":"Mazumder","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","author":"deschamps","year":"2009","journal-title":"Hardware Implementation of Finite-Field Arithmetic"},{"key":"ref11","author":"sudan","year":"2012","journal-title":"Algebra and Computation"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2004.842914"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/12.859542"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2011.2165524"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2065630"},{"key":"ref6","doi-asserted-by":"crossref","first-page":"212","DOI":"10.1109\/TCSII.2013.2251941","article-title":"An efficient interpolation-based Chase BCH decoder","volume":"60","author":"xinmiao","year":"2013","journal-title":"IEEE Trans Circuits Syst II Express Briefs"},{"key":"ref5","first-page":"1","article-title":"Efficient one-pass Chase soft-decision BCH decoder for multi-level cell NAND Flash memory","author":"xinmiao","year":"0","journal-title":"Proc IEEE 54th Int MWSCAS"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"3611","DOI":"10.1109\/TIT.2008.926355","article-title":"New list decoding algorithms for Reed&#x2013;Solomon and BCH codes","volume":"54","author":"yingquan","year":"2008","journal-title":"IEEE Trans Inf Theory"},{"key":"ref7","article-title":"Improved decoding algorithms for Reed&#x2013;Solomon codes","author":"giacomelli","year":"0","journal-title":"arXiv preprint arXiv 1310 2473"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"2721","DOI":"10.1109\/TCSI.2014.2312478","article-title":"A 5.4 $\\mu\\text{W}$ soft-decision BCH decoder for wireless body area networks","volume":"61","author":"chia-hsiang","year":"2014","journal-title":"IEEE Trans Circuits Syst I Reg Papers"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1972.1054746"},{"key":"ref9","author":"costello","year":"2004","journal-title":"Error Control Coding"}],"container-title":["IEEE Transactions on Circuits and Systems II: Express Briefs"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielam\/8920\/7914797\/7492265-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8920\/7914797\/07492265.pdf?arnumber=7492265","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,4,8]],"date-time":"2022-04-08T18:51:41Z","timestamp":1649443901000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/7492265\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,5]]},"references-count":13,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/tcsii.2016.2581587","relation":{},"ISSN":["1549-7747","1558-3791"],"issn-type":[{"value":"1549-7747","type":"print"},{"value":"1558-3791","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017,5]]}}}