{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,10]],"date-time":"2026-01-10T19:06:06Z","timestamp":1768071966482,"version":"3.49.0"},"reference-count":13,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2017,6,1]],"date-time":"2017-06-01T00:00:00Z","timestamp":1496275200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"name":"Phison Electronics Corporation, Taiwan"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. II"],"published-print":{"date-parts":[[2017,6]]},"DOI":"10.1109\/tcsii.2016.2599528","type":"journal-article","created":{"date-parts":[[2016,8,11]],"date-time":"2016-08-11T14:10:08Z","timestamp":1470924608000},"page":"645-649","source":"Crossref","is-referenced-by-count":7,"title":["A 0.035-pJ\/bit\/dB 20-Gb\/s Adaptive Linear Equalizer With an Adaptation Time of 2.68 $\\mu\\text{s}$"],"prefix":"10.1109","volume":"64","author":[{"given":"Kuan-Yu","family":"Chen","sequence":"first","affiliation":[]},{"given":"Wei-Yung","family":"Chen","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3765-2948","authenticated-orcid":false,"given":"Shen-Iuan","family":"Liu","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2237692"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2134450"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2418579"},{"key":"ref13","first-page":"1","article-title":"A 0.622–10 Gb\/s inductorless adaptive linear equalizer with spectral tracking for data rate adaptation in 0.13-$\\mu\\text{m}$ CMOS","author":"ray","year":"0","journal-title":"Proc CICC"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2077050"},{"key":"ref3","first-page":"104","article-title":"A 6 Gb\/s RX equalizer adapted using direct measurement of the equalizer output amplitude","author":"uchiki","year":"0","journal-title":"Proc IEEE ISSCC Dig Tech Papers"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2012.2208671"},{"key":"ref5","first-page":"354","article-title":"A pattern-guided adaptive equalizer in 65 nm CMOS","author":"shahramian","year":"0","journal-title":"Proc IEEE ISSCC Dig Tech Papers"},{"key":"ref8","first-page":"444","article-title":"A 20 Gb\/s digitally adaptive equalizer\/DFE with blind sampling","author":"ying","year":"0","journal-title":"Proc IEEE ISSCC Dig Tech Papers"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2012.2218472"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2010.2047311"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.880629"},{"key":"ref9","first-page":"273","article-title":"A 5–20 Gb\/s power scalable adaptive linear equalizer using edge counting","author":"lin","year":"0","journal-title":"Proc IEEE Asian Solid-State Circuits Conf Dig Tech Papers"}],"container-title":["IEEE Transactions on Circuits and Systems II: Express Briefs"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8920\/7934201\/07542145.pdf?arnumber=7542145","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T11:40:24Z","timestamp":1641987624000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/7542145\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,6]]},"references-count":13,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/tcsii.2016.2599528","relation":{},"ISSN":["1549-7747","1558-3791"],"issn-type":[{"value":"1549-7747","type":"print"},{"value":"1558-3791","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017,6]]}}}