{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,28]],"date-time":"2025-06-28T06:23:26Z","timestamp":1751091806364,"version":"3.37.3"},"reference-count":13,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"4","license":[{"start":{"date-parts":[[2018,4,1]],"date-time":"2018-04-01T00:00:00Z","timestamp":1522540800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. II"],"published-print":{"date-parts":[[2018,4]]},"DOI":"10.1109\/tcsii.2017.2695720","type":"journal-article","created":{"date-parts":[[2017,4,19]],"date-time":"2017-04-19T18:17:11Z","timestamp":1492625831000},"page":"426-430","source":"Crossref","is-referenced-by-count":6,"title":["A 5-Bit 500-MS\/s Asynchronous Digital Slope ADC With Two Comparators"],"prefix":"10.1109","volume":"65","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-2936-8397","authenticated-orcid":false,"given":"Yujun","family":"Shu","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4496-2992","authenticated-orcid":false,"given":"Fengyi","family":"Mei","sequence":"additional","affiliation":[]},{"given":"Youling","family":"Yu","sequence":"additional","affiliation":[]},{"given":"Jiangfeng","family":"Wu","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","first-page":"7","article-title":"The strong ARM latch","volume":"7","author":"razavi","year":"2015","journal-title":"IEEE Solid State Circuits Mag"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISPACS.2013.6704602"},{"key":"ref12","first-page":"1","article-title":"Design of a 5-bit, 4.87GS\/s, \n$240\\mu {\\rm W}$\n  flash ADC using a MUX-based decoder with regenerative buffer in 45-nm CMOS","author":"patel","year":"2015","journal-title":"Proc ICII"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2012.84"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2006.1696261"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2010.5433925"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2164031"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS.2010.5724649"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2015.2451791"},{"key":"ref7","first-page":"487","article-title":"A 5bit 1GS\/s 2.7mW 0.05mm2 asynchronous digital slope ADC in 90nm CMOS for IR UWB radio","author":"ding","year":"2012","journal-title":"Proc IEEE Radio Frequency Integr Circuits Symp"},{"key":"ref2","first-page":"147","article-title":"A 0.47–1.6mW 5bit 0.5–1GS\/s time-interleaved SAR ADC for low-power UWB radios","author":"harpe","year":"2011","journal-title":"Proc ESSCIRC"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2006334"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2016.7418107"}],"container-title":["IEEE Transactions on Circuits and Systems II: Express Briefs"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8920\/8325343\/07904657.pdf?arnumber=7904657","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,26]],"date-time":"2022-01-26T04:59:01Z","timestamp":1643173141000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/7904657\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,4]]},"references-count":13,"journal-issue":{"issue":"4"},"URL":"https:\/\/doi.org\/10.1109\/tcsii.2017.2695720","relation":{},"ISSN":["1549-7747","1558-3791"],"issn-type":[{"type":"print","value":"1549-7747"},{"type":"electronic","value":"1558-3791"}],"subject":[],"published":{"date-parts":[[2018,4]]}}}