{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T19:58:17Z","timestamp":1740167897138,"version":"3.37.3"},"reference-count":14,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2019,3,1]],"date-time":"2019-03-01T00:00:00Z","timestamp":1551398400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,3,1]],"date-time":"2019-03-01T00:00:00Z","timestamp":1551398400000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,3,1]],"date-time":"2019-03-01T00:00:00Z","timestamp":1551398400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,3,1]],"date-time":"2019-03-01T00:00:00Z","timestamp":1551398400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CCF-1253670"],"award-info":[{"award-number":["CCF-1253670"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. II"],"published-print":{"date-parts":[[2019,3]]},"DOI":"10.1109\/tcsii.2018.2854759","type":"journal-article","created":{"date-parts":[[2018,7,10]],"date-time":"2018-07-10T18:42:22Z","timestamp":1531248142000},"page":"477-481","source":"Crossref","is-referenced-by-count":9,"title":["Scaling Up In-Memory-Computing Classifiers via Boosted Feature Subsets in Banked Architectures"],"prefix":"10.1109","volume":"66","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-6667-1833","authenticated-orcid":false,"given":"Yinqi","family":"Tang","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6909-0612","authenticated-orcid":false,"given":"Jintao","family":"Zhang","sequence":"additional","affiliation":[]},{"given":"Naveen","family":"Verma","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1006\/jcss.1997.1504"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1023\/A:1007614523901"},{"key":"ref12","first-page":"1","article-title":"Novel methods for the feature subset ensembles approach","volume":"6","author":"aly","year":"2006","journal-title":"Int J Artificial Intell Machine Learn"},{"key":"ref13","first-page":"111","article-title":"Accelerating adaboost using UCB","author":"busa-fekete","year":"2009","journal-title":"Proc KDD Cup Competition"},{"key":"ref14","first-page":"143","article-title":"Fast boosting using adversarial bandits","author":"busa-fekete","year":"2010","journal-title":"Proc Int Conf Mach Learn (ICML)"},{"key":"ref4","doi-asserted-by":"crossref","first-page":"1009","DOI":"10.1109\/JSSC.2016.2515510","article-title":"A 28 nm configurable memory (TCAM\/BCAM\/SRAM) using push-rule 6T bit cell enabling logic-in-memory","volume":"51","author":"jeloka","year":"2016","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.2014.6855225"},{"key":"ref6","first-page":"496","article-title":"A 65nm 4Kb algorithm-dependent computing-in-memory SRAM unit-macro with 2.3ns and 55.8TOPS\/W fully parallel product-sum operation for binary DNN edge processors","author":"khwa","year":"2018","journal-title":"IEEE Int Solid-State Circuits Conf Dig Tech Papers (ISSCC)"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/5.726791"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2015.2395591"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2016.7783724"},{"key":"ref2","first-page":"10","article-title":"1.1 Computing’s energy problem (and what we can do about it)","author":"horowitz","year":"2014","journal-title":"IEEE Int Solid-State Circuits Conf Dig Tech Papers (ISSCC)"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2642198"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1137\/S0097539701398375"}],"container-title":["IEEE Transactions on Circuits and Systems II: Express Briefs"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielam\/8920\/8653436\/8409339-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8920\/8653436\/08409339.pdf?arnumber=8409339","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,13]],"date-time":"2022-07-13T21:10:25Z","timestamp":1657746625000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8409339\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,3]]},"references-count":14,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/tcsii.2018.2854759","relation":{},"ISSN":["1549-7747","1558-3791"],"issn-type":[{"type":"print","value":"1549-7747"},{"type":"electronic","value":"1558-3791"}],"subject":[],"published":{"date-parts":[[2019,3]]}}}