{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,24]],"date-time":"2025-08-24T00:02:19Z","timestamp":1755993739286,"version":"3.44.0"},"reference-count":14,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2019,3,1]],"date-time":"2019-03-01T00:00:00Z","timestamp":1551398400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,3,1]],"date-time":"2019-03-01T00:00:00Z","timestamp":1551398400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,3,1]],"date-time":"2019-03-01T00:00:00Z","timestamp":1551398400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100003052","name":"Ministry of Trade, Industry and Energy","doi-asserted-by":"publisher","award":["10080570"],"award-info":[{"award-number":["10080570"]}],"id":[{"id":"10.13039\/501100003052","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Gwanak Analog Technologies, Seoul, South Korea"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. II"],"published-print":{"date-parts":[[2019,3]]},"DOI":"10.1109\/tcsii.2018.2858810","type":"journal-article","created":{"date-parts":[[2018,7,24]],"date-time":"2018-07-24T17:23:44Z","timestamp":1532453024000},"page":"372-376","source":"Crossref","is-referenced-by-count":14,"title":["A 12.8-Gb\/s Quarter-Rate Transmitter Using a 4:1 Overlapped Multiplexing Driver Combined With an Adaptive Clock Phase Aligner"],"prefix":"10.1109","volume":"66","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-6354-5612","authenticated-orcid":false,"given":"Joo-Hyung","family":"Chae","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering, Seoul National University, Seoul, South Korea"}]},{"given":"Hyeongjun","family":"Ko","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Seoul National University, Seoul, South Korea"}]},{"given":"Jihwan","family":"Park","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Seoul National University, Seoul, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9107-2963","authenticated-orcid":false,"given":"Suhwan","family":"Kim","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Seoul National University, Seoul, South Korea"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2412688"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2279054"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/IWSDA.2007.4408366"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2075410"},{"key":"ref14","first-page":"411","article-title":"0.11-2.5 GHz all-digital DLL for mobile memory interface with phase sampling window adaptation to reduce jitter accumulation","volume":"17","author":"chae","year":"2017","journal-title":"J Semicond Tech Sci"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2746672"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2013.2258271"},{"key":"ref6","first-page":"249","article-title":"A 5-8Gb\/s low-power transmitter with 2-tap pre-emphasis based on toggling serialization","author":"kim","year":"2016","journal-title":"Proc IEEE Asian Solid-State Circuits Conf (ASSCC)"},{"key":"ref5","first-page":"60","article-title":"3.5 A 16-to-40Gb\/s quarter-rate NRZ\/PAM4 dual-mode transmitter in 14nm CMOS","author":"kim","year":"2015","journal-title":"IEEE Int Solid-State Circuits Conf Dig Tech Papers (ISSCC)"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2017.2779439"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2015.2411791"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2015.7231254"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2017.2748986"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2249812"}],"container-title":["IEEE Transactions on Circuits and Systems II: Express Briefs"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8920\/8653436\/08418737.pdf?arnumber=8418737","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,8,23]],"date-time":"2025-08-23T01:08:24Z","timestamp":1755911304000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8418737\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,3]]},"references-count":14,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/tcsii.2018.2858810","relation":{},"ISSN":["1549-7747","1558-3791"],"issn-type":[{"type":"print","value":"1549-7747"},{"type":"electronic","value":"1558-3791"}],"subject":[],"published":{"date-parts":[[2019,3]]}}}