{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,20]],"date-time":"2026-02-20T18:31:59Z","timestamp":1771612319284,"version":"3.50.1"},"reference-count":26,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"Department of Science and Technology, Science and Engineering Research Board","award":["ECR\/2015\/00148"],"award-info":[{"award-number":["ECR\/2015\/00148"]}]},{"name":"Visvevaraya Young Faculty Fellowship, MeitY (Govt. of India)."}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. II"],"published-print":{"date-parts":[[2019,7]]},"DOI":"10.1109\/tcsii.2018.2878599","type":"journal-article","created":{"date-parts":[[2018,10,30]],"date-time":"2018-10-30T19:05:35Z","timestamp":1540926335000},"page":"1227-1231","source":"Crossref","is-referenced-by-count":19,"title":["Coordinate Rotation-Based Design Methodology for Square Root and Division Computation"],"prefix":"10.1109","volume":"66","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-4938-4995","authenticated-orcid":false,"given":"Suresh","family":"Mopuri","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9534-8808","authenticated-orcid":false,"given":"Swati","family":"Bhardwaj","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5636-0676","authenticated-orcid":false,"given":"Amit","family":"Acharyya","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2009.5413129"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.7763\/IJCTE.2011.V3.281"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ICTSS.2013.6588110"},{"key":"ref13","first-page":"158","article-title":"Novel square root algorithm and its FPGA implementation","author":"kachhwal","year":"2004","journal-title":"Proc IEEE Int Conf Signal Propag Comput Technol (ICSPCT)"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/IC3INA.2014.7042602"},{"key":"ref15","first-page":"954","article-title":"Floating-point division and square root implementation using a taylor-series expansion algorithm with reduced look-up tables","author":"kwon","year":"2008","journal-title":"Proc 51st Midwest Symp Circuits Syst"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2005.52"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2005.54"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2036926"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/DELTA.2010.65"},{"key":"ref4","doi-asserted-by":"crossref","first-page":"755","DOI":"10.1109\/TCSI.2005.844109","article-title":"Application-specific instruction set processor for SoC implementation of modern signal processing algorithms","volume":"52","author":"liu","year":"2005","journal-title":"IEEE Trans Circuits Syst I Reg Papers"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2010.2047744"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/SiPS.2016.15"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TSP.2011.2150219"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/EMBC.2014.6944459"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/EMBC.2015.7319614"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2015.2435753"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.7763\/IJCEE.2013.V5.767"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2009.2025803"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/CCECE.2007.279"},{"key":"ref22","first-page":"1318","article-title":"Design and implementation of reciprocal unit","volume":"2","author":"chen","year":"2005","journal-title":"Proc 48th Midwest Symp Circuits Syst"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2004.1333284"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ReConFig.2013.6732291"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ISNE.2010.5669204"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2740343"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2010.2050946"}],"container-title":["IEEE Transactions on Circuits and Systems II: Express Briefs"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8920\/8746742\/08515067.pdf?arnumber=8515067","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,13]],"date-time":"2022-07-13T21:08:20Z","timestamp":1657746500000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8515067\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,7]]},"references-count":26,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/tcsii.2018.2878599","relation":{},"ISSN":["1549-7747","1558-3791"],"issn-type":[{"value":"1549-7747","type":"print"},{"value":"1558-3791","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,7]]}}}