{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,9]],"date-time":"2026-04-09T14:32:05Z","timestamp":1775745125332,"version":"3.50.1"},"reference-count":26,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","funder":[{"DOI":"10.13039\/501100001809","name":"NSFC","doi-asserted-by":"publisher","award":["61874066"],"award-info":[{"award-number":["61874066"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"NSFC","doi-asserted-by":"publisher","award":["61720106013"],"award-info":[{"award-number":["61720106013"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100012166","name":"National Key Research and Development Program of China","doi-asserted-by":"publisher","award":["2019YFA0706100"],"award-info":[{"award-number":["2019YFA0706100"]}],"id":[{"id":"10.13039\/501100012166","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100012166","name":"National Key Research and Development Program of China","doi-asserted-by":"publisher","award":["2018YFA0701500"],"award-info":[{"award-number":["2018YFA0701500"]}],"id":[{"id":"10.13039\/501100012166","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Key Laboratory of Artificial Intelligence, Ministry of Education"},{"DOI":"10.13039\/501100012282","name":"Beijing Innovation Center for Future Chips","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100012282","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. II"],"published-print":{"date-parts":[[2021,7]]},"DOI":"10.1109\/tcsii.2021.3049844","type":"journal-article","created":{"date-parts":[[2021,1,9]],"date-time":"2021-01-09T19:38:10Z","timestamp":1610221090000},"page":"2262-2266","source":"Crossref","is-referenced-by-count":24,"title":["Enabling Lower-Power Charge-Domain Nonvolatile In-Memory Computing With Ferroelectric FETs"],"prefix":"10.1109","volume":"68","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-1315-9806","authenticated-orcid":false,"given":"Guodong","family":"Yin","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8264-3357","authenticated-orcid":false,"given":"Yi","family":"Cai","sequence":"additional","affiliation":[]},{"given":"Juejian","family":"Wu","sequence":"additional","affiliation":[]},{"given":"Zhengyang","family":"Duan","sequence":"additional","affiliation":[]},{"given":"Zhenhua","family":"Zhu","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4892-2309","authenticated-orcid":false,"given":"Yongpan","family":"Liu","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6108-5157","authenticated-orcid":false,"given":"Yu","family":"Wang","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2421-353X","authenticated-orcid":false,"given":"Huazhong","family":"Yang","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8051-3345","authenticated-orcid":false,"given":"Xueqing","family":"Li","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","author":"lin","year":"2013","journal-title":"Network in Network"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/5.726791"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317737"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2018.8614496"},{"key":"ref14","doi-asserted-by":"crossref","first-page":"499","DOI":"10.1109\/T-ED.1974.17955","article-title":"a new ferroelectric memory device, metal-ferroelectric-semiconductor transistor","volume":"21","author":"wu","year":"1974","journal-title":"IEEE Transactions on Electron Devices"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2016.2523681"},{"key":"ref16","first-page":"25","article-title":"Ferroelectricity in HFO? enables nonvolatile data storage in 28 nm HKMG","author":"m\u00fcller","year":"2012","journal-title":"Proc VLSIT"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2017.2716338"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2013.2290117"},{"key":"ref19","doi-asserted-by":"crossref","first-page":"185","DOI":"10.1109\/LED.2011.2177435","article-title":"Nanosecond polarization switching and long retention in a novel MFIS-FET based on ferroelectric HfO?","volume":"33","author":"muller","year":"2012","journal-title":"IEEE Electron Device Lett"},{"key":"ref4","first-page":"138","article-title":"7.5 A 65nm 0.39-to-140.3 TOPS\/W 1-to-12b unified neural network processor using block-circulant-enabled transpose-domain acceleration with 8.1&#x00D7; higher TOPS\/mm 2 and 6T HBST-TRAM-based 2D data-reuse architecture","author":"yue","year":"2019","journal-title":"Proc IEEE ISSCC"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2869150"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342235"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2899730"},{"key":"ref8","first-page":"525","article-title":"XNOR-Net: ImageNet classification using binary convolutional neural networks","author":"rastegari","year":"2016","journal-title":"Proc ECCV"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/CICC48029.2020.9075887"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2013.6657019"},{"key":"ref9","author":"ioffe","year":"2015","journal-title":"Batch Normalization Accelerating Deep Network Training by Reducing Internal Covariate Shift"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/216585.216588"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/3218603.3218640"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-018-0117-x"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2016.2558149"},{"key":"ref24","year":"2020","journal-title":"Predictive Technology Model"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342199"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/3370748.3406572"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.2992886"}],"container-title":["IEEE Transactions on Circuits and Systems II: Express Briefs"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8920\/9467112\/09316795.pdf?arnumber=9316795","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,26]],"date-time":"2021-10-26T20:25:13Z","timestamp":1635279913000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9316795\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,7]]},"references-count":26,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/tcsii.2021.3049844","relation":{},"ISSN":["1549-7747","1558-3791"],"issn-type":[{"value":"1549-7747","type":"print"},{"value":"1558-3791","type":"electronic"}],"subject":[],"published":{"date-parts":[[2021,7]]}}}