{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,30]],"date-time":"2025-12-30T08:58:26Z","timestamp":1767085106893,"version":"3.37.3"},"reference-count":9,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2022,3,1]],"date-time":"2022-03-01T00:00:00Z","timestamp":1646092800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2022,3,1]],"date-time":"2022-03-01T00:00:00Z","timestamp":1646092800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,3,1]],"date-time":"2022-03-01T00:00:00Z","timestamp":1646092800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100018058","name":"SK Hynix","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100018058","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. II"],"published-print":{"date-parts":[[2022,3]]},"DOI":"10.1109\/tcsii.2021.3110409","type":"journal-article","created":{"date-parts":[[2021,9,6]],"date-time":"2021-09-06T20:24:59Z","timestamp":1630959899000},"page":"814-818","source":"Crossref","is-referenced-by-count":5,"title":["A Clock Distribution Scheme Insensitive to Supply Voltage Drift With Self-Adjustment of Clock Buffer Delay"],"prefix":"10.1109","volume":"69","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-6439-4825","authenticated-orcid":false,"given":"Soyeong","family":"Shin","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center, Seoul National University, Seoul, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8285-1527","authenticated-orcid":false,"given":"Yongjae","family":"Lee","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center, Seoul National University, Seoul, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7649-6415","authenticated-orcid":false,"given":"Jiheon","family":"Park","sequence":"additional","affiliation":[{"name":"System LSI, Samsung Electronics, Hwaseong, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1921-8037","authenticated-orcid":false,"given":"Ji-Hyo","family":"Kang","sequence":"additional","affiliation":[{"name":"SK Hynix, Icheon, South Korea"}]},{"given":"Kyunghoon","family":"Kim","sequence":"additional","affiliation":[{"name":"SK Hynix, Icheon, South Korea"}]},{"given":"Dae-Han","family":"Kwon","sequence":"additional","affiliation":[{"name":"SK Hynix, Icheon, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7338-1316","authenticated-orcid":false,"given":"Sangkwon","family":"Lee","sequence":"additional","affiliation":[{"name":"SK Hynix, Icheon, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0224-6154","authenticated-orcid":false,"given":"Jieun","family":"Jang","sequence":"additional","affiliation":[{"name":"SK Hynix, Icheon, South Korea"}]},{"given":"Joo-Hwan","family":"Cho","sequence":"additional","affiliation":[{"name":"SK Hynix, Icheon, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0436-703X","authenticated-orcid":false,"given":"Deog-Kyoon","family":"Jeong","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center, Seoul National University, Seoul, South Korea"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2008.931647"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757430"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.818300"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2019.2957042"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2002.1010730"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2007.373486"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/4.52187"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.892194"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2019.2894104"}],"container-title":["IEEE Transactions on Circuits and Systems II: Express Briefs"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8920\/9736462\/09530270.pdf?arnumber=9530270","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,11]],"date-time":"2024-01-11T23:34:08Z","timestamp":1705016048000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9530270\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,3]]},"references-count":9,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/tcsii.2021.3110409","relation":{},"ISSN":["1549-7747","1558-3791"],"issn-type":[{"type":"print","value":"1549-7747"},{"type":"electronic","value":"1558-3791"}],"subject":[],"published":{"date-parts":[[2022,3]]}}}