{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,17]],"date-time":"2025-09-17T15:26:50Z","timestamp":1758122810259,"version":"3.37.3"},"reference-count":17,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2022,6,1]],"date-time":"2022-06-01T00:00:00Z","timestamp":1654041600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2022,6,1]],"date-time":"2022-06-01T00:00:00Z","timestamp":1654041600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,6,1]],"date-time":"2022-06-01T00:00:00Z","timestamp":1654041600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100012166","name":"National Key Research and Development Program of China","doi-asserted-by":"publisher","award":["2018YFB2202900"],"award-info":[{"award-number":["2018YFB2202900"]}],"id":[{"id":"10.13039\/501100012166","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100017530","name":"Major Scientific Research Project of Zhejiang Lab","doi-asserted-by":"publisher","award":["2019KC0AD02"],"award-info":[{"award-number":["2019KC0AD02"]}],"id":[{"id":"10.13039\/501100017530","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62025406","61904200","61888102","92164204"],"award-info":[{"award-number":["62025406","61904200","61888102","92164204"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100002367","name":"Strategic Priority Research Program of the Chinese Academy of Sciences","doi-asserted-by":"publisher","award":["XDB44000000"],"award-info":[{"award-number":["XDB44000000"]}],"id":[{"id":"10.13039\/501100002367","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. II"],"published-print":{"date-parts":[[2022,6]]},"DOI":"10.1109\/tcsii.2022.3157767","type":"journal-article","created":{"date-parts":[[2022,3,8]],"date-time":"2022-03-08T21:31:28Z","timestamp":1646775088000},"page":"2697-2701","source":"Crossref","is-referenced-by-count":8,"title":["A 0.02% Accuracy Loss Voltage-Mode Parallel Sensing Scheme for RRAM-Based XNOR-Net Application"],"prefix":"10.1109","volume":"69","author":[{"given":"Yulin","family":"Zhao","sequence":"first","affiliation":[{"name":"Key Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jie","family":"Yu","sequence":"additional","affiliation":[{"name":"Key Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Donglin","family":"Zhang","sequence":"additional","affiliation":[{"name":"Key Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Qiao","family":"Hu","sequence":"additional","affiliation":[{"name":"School of Microelectronics, University of Science and Technology of China, Hefei, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xuanzhi","family":"Liu","sequence":"additional","affiliation":[{"name":"School of Microelectronics, University of Science and Technology of China, Hefei, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Haijun","family":"Jiang","sequence":"additional","affiliation":[{"name":"Research Center for Intelligent Computing Hardware, Zhejiang Lab, Hangzhou, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Qingting","family":"Ding","sequence":"additional","affiliation":[{"name":"Key Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zhongze","family":"Han","sequence":"additional","affiliation":[{"name":"Key Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jinhui","family":"Cheng","sequence":"additional","affiliation":[{"name":"School of Microelectronics, University of Science and Technology of China, Hefei, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4424-7633","authenticated-orcid":false,"given":"Wenjun","family":"Zhang","sequence":"additional","affiliation":[{"name":"Research Center for Intelligent Computing Hardware, Zhejiang Lab, Hangzhou, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6948-7222","authenticated-orcid":false,"given":"Yue","family":"Cao","sequence":"additional","affiliation":[{"name":"Research Center for Intelligent Computing Hardware, Zhejiang Lab, Hangzhou, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ruixi","family":"Zhou","sequence":"additional","affiliation":[{"name":"Research Center for Intelligent Computing Hardware, Zhejiang Lab, Hangzhou, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hongfei","family":"Lu","sequence":"additional","affiliation":[{"name":"Research Center for Intelligent Computing Hardware, Zhejiang Lab, Hangzhou, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0277-1314","authenticated-orcid":false,"given":"Xiaoxin","family":"Xu","sequence":"additional","affiliation":[{"name":"Key Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3387-1238","authenticated-orcid":false,"given":"Jianguo","family":"Yang","sequence":"additional","affiliation":[{"name":"Research Center for Intelligent Computing Hardware, Zhejiang Lab, Hangzhou, China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","article-title":"Binarized neural networks: Training deep neural networks with weights and activations constrained to +1 or \u22121","author":"Courbariaux","year":"2016","journal-title":"arXiv:1602.02830"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-46493-0_32"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2018.2848625"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2016.7838429"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2018.8614642"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342235"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3079980"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2021.3049844"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-019-0288-0"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2018.8510676"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/VLSITechnology18217.2020.9265066"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2019.8662395"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1038\/srep07764"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM13553.2020.9371968"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2018.8310400"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1038\/s41586-020-1942-4"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM19573.2019.8993599"}],"container-title":["IEEE Transactions on Circuits and Systems II: Express Briefs"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8920\/9786589\/09729880.pdf?arnumber=9729880","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,17]],"date-time":"2024-01-17T23:55:43Z","timestamp":1705535743000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9729880\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,6]]},"references-count":17,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/tcsii.2022.3157767","relation":{},"ISSN":["1549-7747","1558-3791"],"issn-type":[{"type":"print","value":"1549-7747"},{"type":"electronic","value":"1558-3791"}],"subject":[],"published":{"date-parts":[[2022,6]]}}}