{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,2]],"date-time":"2026-06-02T23:58:09Z","timestamp":1780444689513,"version":"3.54.1"},"reference-count":48,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2022,6,1]],"date-time":"2022-06-01T00:00:00Z","timestamp":1654041600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2022,6,1]],"date-time":"2022-06-01T00:00:00Z","timestamp":1654041600000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2022,6,1]],"date-time":"2022-06-01T00:00:00Z","timestamp":1654041600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,6,1]],"date-time":"2022-06-01T00:00:00Z","timestamp":1654041600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"Natural Science Foundation","doi-asserted-by":"publisher","award":["1955246"],"award-info":[{"award-number":["1955246"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"Natural Science Foundation","doi-asserted-by":"publisher","award":["1910299"],"award-info":[{"award-number":["1910299"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"Natural Science Foundation","doi-asserted-by":"publisher","award":["1725456"],"award-info":[{"award-number":["1725456"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000183","name":"Army Research Office","doi-asserted-by":"publisher","award":["W911NF-19-2-0107"],"award-info":[{"award-number":["W911NF-19-2-0107"]}],"id":[{"id":"10.13039\/100000183","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. II"],"published-print":{"date-parts":[[2022,6]]},"DOI":"10.1109\/tcsii.2022.3168404","type":"journal-article","created":{"date-parts":[[2022,4,19]],"date-time":"2022-04-19T19:32:28Z","timestamp":1650396748000},"page":"2598-2603","source":"Crossref","is-referenced-by-count":13,"title":["Processing-in-Memory Technology for Machine Learning: From Basic to ASIC"],"prefix":"10.1109","volume":"69","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-2032-0960","authenticated-orcid":false,"given":"Brady","family":"Taylor","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Qilin","family":"Zheng","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1230-7953","authenticated-orcid":false,"given":"Ziru","family":"Li","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1990-7150","authenticated-orcid":false,"given":"Shiyu","family":"Li","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1486-8412","authenticated-orcid":false,"given":"Yiran","family":"Chen","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1038\/nnano.2012.240"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1002\/adma.201705914"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2013.6629302"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1088\/0957-4484\/27\/36\/365202"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.12"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-018-0100-6"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/IJCNN.2012.6252563"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.13"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.55"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2018.8351276"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2017.7858419"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342235"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1007\/s42514-019-00014-8"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218578"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744783"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317936"},{"key":"ref17","first-page":"1","article-title":"MobiLattice: A depth-wise DCNN accelerator with hybrid digital\/analog nonvolatile processing-in-memory block","volume-title":"Proc. IEEE\/ACM Int. Conf. Comput. Aided Design (ICCAD)","author":"Zheng"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIT.2019.8776485"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2016.46"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2016.7527509"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2014.7001330"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2014.2310200"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1002\/advs.201900024"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/3386263.3407579"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.3005754"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2952773"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3073254"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2880918"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2899730"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3056447"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42614.2022.9731681"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42613.2021.9365766"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2019.8902824"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2014.2357292"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240811"},{"key":"ref36","first-page":"1","article-title":"ReTransformer: ReRAM-based processing-in-memory architecture for transformer acceleration","volume-title":"Proc. 39th Int. Conf. Comput.-Aided Design","author":"Yang"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2017.2750064"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218590"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.21"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO50266.2020.00021"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2018.00040"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA52012.2021.00013"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080246"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2018.8310262"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42614.2022.9731545"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3103603"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/CICC51472.2021.9431575"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42614.2022.9731716"}],"container-title":["IEEE Transactions on Circuits and Systems II: Express Briefs"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielam\/8920\/9786589\/9759466-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8920\/9786589\/09759466.pdf?arnumber=9759466","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,22]],"date-time":"2024-01-22T21:23:45Z","timestamp":1705958625000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9759466\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,6]]},"references-count":48,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/tcsii.2022.3168404","relation":{},"ISSN":["1549-7747","1558-3791"],"issn-type":[{"value":"1549-7747","type":"print"},{"value":"1558-3791","type":"electronic"}],"subject":[],"published":{"date-parts":[[2022,6]]}}}