{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,16]],"date-time":"2026-01-16T00:49:36Z","timestamp":1768524576971,"version":"3.49.0"},"reference-count":17,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"4","license":[{"start":{"date-parts":[[2023,4,1]],"date-time":"2023-04-01T00:00:00Z","timestamp":1680307200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2023,4,1]],"date-time":"2023-04-01T00:00:00Z","timestamp":1680307200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,4,1]],"date-time":"2023-04-01T00:00:00Z","timestamp":1680307200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"Science and Technology Development Fund, Macau, SAR","award":["FDCT 0024\/2021\/A"],"award-info":[{"award-number":["FDCT 0024\/2021\/A"]}]},{"name":"Science and Technology Development Fund, Macau, SAR","award":["FDCT 0036\/2020\/AGJ"],"award-info":[{"award-number":["FDCT 0036\/2020\/AGJ"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. II"],"published-print":{"date-parts":[[2023,4]]},"DOI":"10.1109\/tcsii.2022.3231536","type":"journal-article","created":{"date-parts":[[2022,12,22]],"date-time":"2022-12-22T18:34:10Z","timestamp":1671734050000},"page":"1351-1355","source":"Crossref","is-referenced-by-count":4,"title":["Universal Stability Criterion for Type-I Sampling Phase-Locked Loops"],"prefix":"10.1109","volume":"70","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-1355-7583","authenticated-orcid":false,"given":"Yunbo","family":"Huang","sequence":"first","affiliation":[{"name":"State-Key Laboratory of Analog and Mixed-Signal VLSI and IME\/ECE-FST, University of Macau, Macau, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2794-1324","authenticated-orcid":false,"given":"Yong","family":"Chen","sequence":"additional","affiliation":[{"name":"State-Key Laboratory of Analog and Mixed-Signal VLSI and IME\/ECE-FST, University of Macau, Macau, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3579-8740","authenticated-orcid":false,"given":"Pui-In","family":"Mak","sequence":"additional","affiliation":[{"name":"State-Key Laboratory of Analog and Mixed-Signal VLSI and IME\/ECE-FST, University of Macau, Macau, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2821-648X","authenticated-orcid":false,"given":"Rui P.","family":"Martins","sequence":"additional","affiliation":[{"name":"State-Key Laboratory of Analog and Mixed-Signal VLSI and IME\/ECE-FST, University of Macau, Macau, China"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2874013"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/isscc19947.2020.9063135"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/LSSC.2020.3031901"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2021.3094934"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/cicc.2018.8357091"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3065462"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3057580"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCOM.1980.1094619"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2016.2537823"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2018.8351180"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2511157"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2022.3162665"},{"key":"ref13","volume-title":"CMOS Analog Circuit Design","author":"Allen","year":"1987"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2053094"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2019.8662364"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.2967562"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2021.3131219"}],"container-title":["IEEE Transactions on Circuits and Systems II: Express Briefs"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8920\/10083009\/09997103.pdf?arnumber=9997103","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,3,2]],"date-time":"2024-03-02T12:03:19Z","timestamp":1709380999000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9997103\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,4]]},"references-count":17,"journal-issue":{"issue":"4"},"URL":"https:\/\/doi.org\/10.1109\/tcsii.2022.3231536","relation":{},"ISSN":["1549-7747","1558-3791"],"issn-type":[{"value":"1549-7747","type":"print"},{"value":"1558-3791","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023,4]]}}}