{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,4,27]],"date-time":"2025-04-27T22:22:10Z","timestamp":1745792530663,"version":"3.37.3"},"reference-count":18,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2023,7,1]],"date-time":"2023-07-01T00:00:00Z","timestamp":1688169600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2023,7,1]],"date-time":"2023-07-01T00:00:00Z","timestamp":1688169600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,7,1]],"date-time":"2023-07-01T00:00:00Z","timestamp":1688169600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61874028","61834009"],"award-info":[{"award-number":["61874028","61834009"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003399","name":"Science and Technology Commission of Shanghai Municipality","doi-asserted-by":"publisher","award":["21TS1401200","22ZR1407100"],"award-info":[{"award-number":["21TS1401200","22ZR1407100"]}],"id":[{"id":"10.13039\/501100003399","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Opening Project of Zhejiang Laboratory","award":["2022PF0AB01"],"award-info":[{"award-number":["2022PF0AB01"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. II"],"published-print":{"date-parts":[[2023,7]]},"DOI":"10.1109\/tcsii.2023.3240193","type":"journal-article","created":{"date-parts":[[2023,1,27]],"date-time":"2023-01-27T18:45:11Z","timestamp":1674845111000},"page":"2645-2649","source":"Crossref","is-referenced-by-count":3,"title":["An Emerging NVM CIM Accelerator With Shared-Path Transpose Read and Bit-Interleaving Weight Storage for Efficient On-Chip Training in Edge Devices"],"prefix":"10.1109","volume":"70","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-0251-1408","authenticated-orcid":false,"given":"Zhiwang","family":"Guo","sequence":"first","affiliation":[{"name":"State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, China"}]},{"given":"Deyang","family":"Chen","sequence":"additional","affiliation":[{"name":"State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5054-8141","authenticated-orcid":false,"given":"Chenyang","family":"Zhao","sequence":"additional","affiliation":[{"name":"State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, China"}]},{"given":"Jinbei","family":"Fang","sequence":"additional","affiliation":[{"name":"State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, China"}]},{"given":"Jingwen","family":"Jiang","sequence":"additional","affiliation":[{"name":"State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, China"}]},{"given":"Yixuan","family":"Liu","sequence":"additional","affiliation":[{"name":"State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, China"}]},{"given":"Haidong","family":"Tian","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Mobile Network and Mobile Communication Multimedia Technology, ZTE, Shenzhen, China"}]},{"given":"Xiankui","family":"Xiong","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Mobile Network and Mobile Communication Multimedia Technology, ZTE, Shenzhen, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3078-4542","authenticated-orcid":false,"given":"Keji","family":"Zhou","sequence":"additional","affiliation":[{"name":"Frontier Institute of Chip and System, Fudan University, Shanghai, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9001-4569","authenticated-orcid":false,"given":"Xiaoyong","family":"Xue","sequence":"additional","affiliation":[{"name":"State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7062-831X","authenticated-orcid":false,"given":"Qi","family":"Liu","sequence":"additional","affiliation":[{"name":"Frontier Institute of Chip and System, Fudan University, Shanghai, China"}]},{"given":"Xiaoyang","family":"Zeng","sequence":"additional","affiliation":[{"name":"State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, China"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.55"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/tmag.2021.3069372"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2015.7409716"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080246"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/isscc42614.2022.9731715"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/isscc42614.2022.9731681"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9063134"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9062949"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218524"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/iscas48785.2022.9937908"},{"key":"ref11","first-page":"1","article-title":"A 14nm 100Kb 2T1R Transpose RRAM with150X resistance ratio enhancement and 27.% reduction on energy-latency product using low-power near threshold read operation and fast data-line current stabling scheme","volume-title":"Proc. Symp. VLSI Technol.","author":"Wang"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ASP-DAC47756.2020.9045288"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS45731.2020.9181020"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2020.2980533"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/tc.2021.3122872"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/iscas51556.2021.9401723"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9062979"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-019-0270-x"}],"container-title":["IEEE Transactions on Circuits and Systems II: Express Briefs"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8920\/10164655\/10026844.pdf?arnumber=10026844","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,4,12]],"date-time":"2024-04-12T05:48:02Z","timestamp":1712900882000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10026844\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,7]]},"references-count":18,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/tcsii.2023.3240193","relation":{},"ISSN":["1549-7747","1558-3791"],"issn-type":[{"type":"print","value":"1549-7747"},{"type":"electronic","value":"1558-3791"}],"subject":[],"published":{"date-parts":[[2023,7]]}}}