{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,17]],"date-time":"2026-01-17T08:03:42Z","timestamp":1768637022530,"version":"3.49.0"},"reference-count":12,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2024,1,1]],"date-time":"2024-01-01T00:00:00Z","timestamp":1704067200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2024,1,1]],"date-time":"2024-01-01T00:00:00Z","timestamp":1704067200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,1,1]],"date-time":"2024-01-01T00:00:00Z","timestamp":1704067200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62201234"],"award-info":[{"award-number":["62201234"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100012221","name":"Scientific Research Foundation for the High-Level Talents of Jinling Institute of Technology","doi-asserted-by":"publisher","award":["jit-b-201907"],"award-info":[{"award-number":["jit-b-201907"]}],"id":[{"id":"10.13039\/501100012221","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. II"],"published-print":{"date-parts":[[2024,1]]},"DOI":"10.1109\/tcsii.2023.3307676","type":"journal-article","created":{"date-parts":[[2023,8,23]],"date-time":"2023-08-23T14:09:57Z","timestamp":1692799797000},"page":"450-454","source":"Crossref","is-referenced-by-count":1,"title":["FDM: Fused Double-Multiply Design for Low-Latency and Area- and Power-Efficient Implementation"],"prefix":"10.1109","volume":"71","author":[{"given":"Yu","family":"Wang","sequence":"first","affiliation":[{"name":"School of Electronics Engineering, Nanjing Xiaozhuang University, Nanjing, China"}]},{"given":"Xingcheng","family":"Liang","sequence":"additional","affiliation":[{"name":"School of Electronics and Information Engineering, Jinling Institute of Technology, Nanjing, China"}]},{"ORCID":"https:\/\/orcid.org\/0009-0005-7774-3069","authenticated-orcid":false,"given":"Shuai","family":"Niu","sequence":"additional","affiliation":[{"name":"School of Electronics and Information Engineering, Jinling Institute of Technology, Nanjing, China"}]},{"given":"Chi","family":"Zhang","sequence":"additional","affiliation":[{"name":"School of Electronics and Information Engineering, Jinling Institute of Technology, Nanjing, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2282-1574","authenticated-orcid":false,"given":"Fei","family":"Lyu","sequence":"additional","affiliation":[{"name":"School of Electronics and Information Engineering, Jinling Institute of Technology, Nanjing, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4450-066X","authenticated-orcid":false,"given":"Yuanyong","family":"Luo","sequence":"additional","affiliation":[{"name":"Department of Turing Architecture Design, HiSilicon, Linx Lab, Huawei Corporation, Shenzhen, China"}]}],"member":"263","reference":[{"key":"ref1","first-page":"17","article-title":"a \u22c5(x\u22c5 x) or (a\u22c5 x)\u22c5 x?","volume-title":"Proc. IEEE 28th Symp. Comput. Arithmetic (ARITH)","author":"Muller"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.3390\/electronics10212704"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.2197\/ipsjtsldm.3.118"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ARITH.1995.465377"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/82.539004"},{"key":"ref6","article-title":"Arithmetic module design and its application to FFT","author":"Yeh","year":"2001"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JRPROC.1961.287779"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/AHS.2009.21"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2000.862391"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2013.2283695"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2020.3003684"},{"key":"ref12","volume-title":"Fast Multiplication: Algorithms and Implementation","author":"Bewick","year":"1994"}],"container-title":["IEEE Transactions on Circuits and Systems II: Express Briefs"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8920\/10385034\/10227367.pdf?arnumber=10227367","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,1,16]],"date-time":"2026-01-16T20:52:55Z","timestamp":1768596775000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10227367\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,1]]},"references-count":12,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/tcsii.2023.3307676","relation":{},"ISSN":["1549-7747","1558-3791"],"issn-type":[{"value":"1549-7747","type":"print"},{"value":"1558-3791","type":"electronic"}],"subject":[],"published":{"date-parts":[[2024,1]]}}}