{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,23]],"date-time":"2026-01-23T19:10:43Z","timestamp":1769195443727,"version":"3.49.0"},"reference-count":16,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2024,6,1]],"date-time":"2024-06-01T00:00:00Z","timestamp":1717200000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2024,6,1]],"date-time":"2024-06-01T00:00:00Z","timestamp":1717200000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,6,1]],"date-time":"2024-06-01T00:00:00Z","timestamp":1717200000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. II"],"published-print":{"date-parts":[[2024,6]]},"DOI":"10.1109\/tcsii.2024.3356171","type":"journal-article","created":{"date-parts":[[2024,1,19]],"date-time":"2024-01-19T18:55:44Z","timestamp":1705690544000},"page":"3221-3225","source":"Crossref","is-referenced-by-count":7,"title":["Improved Dual Boost Mid-Point Clamped Five-Level Inverter Topology"],"prefix":"10.1109","volume":"71","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-4247-8972","authenticated-orcid":false,"given":"M. Jagabar","family":"Sathik","sequence":"first","affiliation":[{"name":"Department of Electrical and Electronics Engineering, SRM Institute of Science and Technology (Kattankulathur), Chennai, India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9494-4090","authenticated-orcid":false,"given":"N. P.","family":"Gopinath","sequence":"additional","affiliation":[{"name":"Department of Electrical and Electronics Engineering, SRM Institute of Science and Technology (Kattankulathur), Chennai, India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0760-5446","authenticated-orcid":false,"given":"Arpan","family":"Hota","sequence":"additional","affiliation":[{"name":"Electrical Engineering Department, Indian Institute of Science and Technology Bombay, Mumbai, India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0376-6293","authenticated-orcid":false,"given":"K.","family":"Vijayakumar","sequence":"additional","affiliation":[{"name":"Department of Electrical and Electronics Engineering, SRM Institute of Science and Technology (Kattankulathur), Chennai, India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8544-8995","authenticated-orcid":false,"given":"Saad","family":"Mekhilef","sequence":"additional","affiliation":[{"name":"School of Science, Computing and Engineering Technologies, Swinburne University of Technology, Hawthorn, VIC, Australia"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7287-3455","authenticated-orcid":false,"given":"Vivek","family":"Agarwal","sequence":"additional","affiliation":[{"name":"Electrical Engineering Department, Indian Institute of Science and Technology Bombay, Mumbai, India"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2009.2032430"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ECCE.2013.6646852"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2017.2774723"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/oncon56984.2022.10126536"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ecce.2019.8912728"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2023.3257959"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2016.2614265"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/iecon.2019.8926832"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1002\/cta.3279"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1016\/j.seta.2022.102850"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/PEDES56012.2022.10080312"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2022.3148756"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JESTPE.2021.3095125"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2023.3253806"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1049\/pel2.12111"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2023.3264172"}],"container-title":["IEEE Transactions on Circuits and Systems II: Express Briefs"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8920\/10561573\/10409612.pdf?arnumber=10409612","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,12,30]],"date-time":"2024-12-30T19:48:36Z","timestamp":1735588116000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10409612\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,6]]},"references-count":16,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/tcsii.2024.3356171","relation":{},"ISSN":["1549-7747","1558-3791"],"issn-type":[{"value":"1549-7747","type":"print"},{"value":"1558-3791","type":"electronic"}],"subject":[],"published":{"date-parts":[[2024,6]]}}}