{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,26]],"date-time":"2025-11-26T19:13:55Z","timestamp":1764184435137,"version":"3.46.0"},"reference-count":15,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"4","license":[{"start":{"date-parts":[[2025,4,1]],"date-time":"2025-04-01T00:00:00Z","timestamp":1743465600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,4,1]],"date-time":"2025-04-01T00:00:00Z","timestamp":1743465600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,4,1]],"date-time":"2025-04-01T00:00:00Z","timestamp":1743465600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100012166","name":"National Key Research and Development Program of China","doi-asserted-by":"publisher","award":["2022YFF1202302"],"award-info":[{"award-number":["2022YFF1202302"]}],"id":[{"id":"10.13039\/501100012166","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100019065","name":"Beijing Science and Technology Plan","doi-asserted-by":"publisher","award":["Z201100004320006"],"award-info":[{"award-number":["Z201100004320006"]}],"id":[{"id":"10.13039\/501100019065","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. II"],"published-print":{"date-parts":[[2025,4]]},"DOI":"10.1109\/tcsii.2025.3540008","type":"journal-article","created":{"date-parts":[[2025,2,7]],"date-time":"2025-02-07T13:49:20Z","timestamp":1738936160000},"page":"534-538","source":"Crossref","is-referenced-by-count":0,"title":["An All-Digital and Wide-Range De-Skew Circuit With Dual-Edge Correction Scheme for Source Synchronous Interfaces"],"prefix":"10.1109","volume":"72","author":[{"ORCID":"https:\/\/orcid.org\/0009-0002-0986-4799","authenticated-orcid":false,"given":"Yongshan","family":"Wang","sequence":"first","affiliation":[{"name":"Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0904-6702","authenticated-orcid":false,"given":"Fei","family":"Liu","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China"}]},{"ORCID":"https:\/\/orcid.org\/0009-0006-4483-800X","authenticated-orcid":false,"given":"Fangyuan","family":"Jin","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China"}]},{"given":"Jian","family":"Huo","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.23919\/VLSITechnologyandCir57934.2023.10185391"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2012.2227853"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1049\/el.2017.4341"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2019.2951412"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2013.2260186"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2019.2893498"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2012.6248823"},{"volume-title":"Open NAND flash interface specification","year":"2021","key":"ref8"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2020.2964908"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2012.6341288"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2015.2468911"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/esscirc.2008.4681797"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2011.2182216"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1049\/ell2.12793"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1587\/elex.20.20230557"}],"container-title":["IEEE Transactions on Circuits and Systems II: Express Briefs"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/8920\/10945816\/10877875.pdf?arnumber=10877875","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,11,26]],"date-time":"2025-11-26T19:07:08Z","timestamp":1764184028000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10877875\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,4]]},"references-count":15,"journal-issue":{"issue":"4"},"URL":"https:\/\/doi.org\/10.1109\/tcsii.2025.3540008","relation":{},"ISSN":["1549-7747","1558-3791"],"issn-type":[{"type":"print","value":"1549-7747"},{"type":"electronic","value":"1558-3791"}],"subject":[],"published":{"date-parts":[[2025,4]]}}}