{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,5]],"date-time":"2026-05-05T04:19:06Z","timestamp":1777954746649,"version":"3.51.4"},"reference-count":16,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2026,5,1]],"date-time":"2026-05-01T00:00:00Z","timestamp":1777593600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2026,5,1]],"date-time":"2026-05-01T00:00:00Z","timestamp":1777593600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,5,1]],"date-time":"2026-05-01T00:00:00Z","timestamp":1777593600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"National Key Research and Development Program of China","award":["2025YFF0514501"],"award-info":[{"award-number":["2025YFF0514501"]}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62434003"],"award-info":[{"award-number":["62434003"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. II"],"published-print":{"date-parts":[[2026,5]]},"DOI":"10.1109\/tcsii.2026.3680570","type":"journal-article","created":{"date-parts":[[2026,4,3]],"date-time":"2026-04-03T19:57:12Z","timestamp":1775246232000},"page":"533-537","source":"Crossref","is-referenced-by-count":0,"title":["A 4-GHz Ring-VCO-Based Wideband Double-Sampling PLL With \u221288.2-dBc Reference Spur, 119-fs\n                    <sub>RMS<\/sub>\n                    Jitter and \u2212244.1-dB FOM"],"prefix":"10.1109","volume":"73","author":[{"ORCID":"https:\/\/orcid.org\/0009-0002-1525-3580","authenticated-orcid":false,"given":"Longbiao","family":"Wang","sequence":"first","affiliation":[{"name":"State Key Laboratory of Integrated Chip and System, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ming","family":"Che","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chip and System, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tianyuan","family":"Zhang","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chip and System, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Guanghui","family":"Zhao","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chip and System, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Pengcheng","family":"He","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chip and System, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7012-404X","authenticated-orcid":false,"given":"Na","family":"Yan","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chip and System, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yu","family":"Zhao","sequence":"additional","affiliation":[{"name":"Wuxi Grand Microelectronics Co., Ltd.,, Wuxi, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0044-1231","authenticated-orcid":false,"given":"Hao","family":"Xu","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chip and System, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2872-9421","authenticated-orcid":false,"given":"Peng","family":"Chen","sequence":"additional","affiliation":[{"name":"School of Electrical and Electronic Engineering, University College Dublin, Dublin 4, Ireland"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7581-2084","authenticated-orcid":false,"given":"Xiongchuan","family":"Huang","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chip and System, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2511157"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/cicc.2018.8357091"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/isscc49657.2024.10454291"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/isscc49657.2024.10454445"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/VLSITechnologyandCir46769.2022.9830382"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2959735"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2024.3460072"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/LMWT.2024.3377117"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/LSSC.2020.3031901"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2022.3225105"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2889690"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2053094"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2021.3094934"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2022.3231536"},{"key":"ref15","volume-title":"CMOS Analog Circuit Design","author":"Allen","year":"1987"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2022.3209614"}],"container-title":["IEEE Transactions on Circuits and Systems II: Express Briefs"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/8920\/11503375\/11474586.pdf?arnumber=11474586","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,5,4]],"date-time":"2026-05-04T19:39:12Z","timestamp":1777923552000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11474586\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,5]]},"references-count":16,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/tcsii.2026.3680570","relation":{},"ISSN":["1549-7747","1558-3791"],"issn-type":[{"value":"1549-7747","type":"print"},{"value":"1558-3791","type":"electronic"}],"subject":[],"published":{"date-parts":[[2026,5]]}}}