{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,21]],"date-time":"2025-05-21T06:11:04Z","timestamp":1747807864641},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/test.2003.1270852","type":"proceedings-article","created":{"date-parts":[[2004,7,8]],"date-time":"2004-07-08T20:05:44Z","timestamp":1089317144000},"page":"299-308","source":"Crossref","is-referenced-by-count":25,"title":["Race a word-level atpg-based constraints solver system for smart random simulation"],"prefix":"10.1109","volume":"1","author":[{"given":"M.A.","family":"Iyer","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"journal-title":"IEEE Std P1364-2001","article-title":"IEEE Standard Hardware Description Language Based on Verilog Hardware Description Language","year":"2001","key":"ref10"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1999.805847"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/43.310903"},{"journal-title":"VCS 7 0 Reference Manual","year":"2003","key":"ref13"},{"journal-title":"Vera 6 0 Reference Manual","year":"2003","key":"ref14"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1999.810715"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1147\/sj.413.0386"},{"article-title":"Writing Testbenches: Functional Verification of HDL Models","year":"2000","author":"bergeron","key":"ref3"},{"key":"ref6","first-page":"245","article-title":"Constraint Solving for Test Case Generation","author":"chandra","year":"0","journal-title":"Proceedings of International Conference on Computer Design 1992"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1986.1676819"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1981.1675757"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/92.386220"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1147\/sj.304.0527"},{"article-title":"Digital Systems Testing and Testable Design","year":"1995","author":"abramovici","key":"ref1"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2000.855289"}],"event":{"name":"International Test Conference, 2003. ITC 2003.","location":"Washington, DC, USA"},"container-title":["International Test Conference, 2003. Proceedings. ITC 2003."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8970\/28457\/01270852.pdf?arnumber=1270852","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,14]],"date-time":"2017-03-14T01:58:09Z","timestamp":1489456689000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1270852\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/test.2003.1270852","relation":{},"subject":[]}}