{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,6]],"date-time":"2024-08-06T07:14:01Z","timestamp":1722928441122},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/test.2003.1270883","type":"proceedings-article","created":{"date-parts":[[2004,7,8]],"date-time":"2004-07-08T16:05:44Z","timestamp":1089302744000},"page":"565-573","source":"Crossref","is-referenced-by-count":5,"title":["Screening vdsm outliers using nominal and subthreshold supply voltage I\/sub DDQ\/"],"prefix":"10.1109","volume":"1","author":[{"given":"C.","family":"Schuermyer","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"B.","family":"Benware","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"K.","family":"Cota","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"R.","family":"Madge","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"R.","family":"Daasch","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"L.","family":"Ning","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","first-page":"738","article-title":"Current Ratios: A Self-Scaling Technique for Production IPDQ Testing","author":"maxwell","year":"1999","journal-title":"International Test Conference"},{"key":"ref3","first-page":"189","article-title":"Variance Reduction Using Wafer Patterns in IDDQ Data","author":"daasch","year":"2000","journal-title":"International Test Conference"},{"key":"ref10","first-page":"146","article-title":"Intrinsic Leakage in Low Power Deep submicron CMOS ICs","author":"keshavarzi","year":"1997","journal-title":"International Test Conference"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2002.1041882"},{"key":"ref11","first-page":"136","article-title":"IDDQ Characterization in submicron CMOS","author":"ferre","year":"1997","journal-title":"International Test Conference"},{"key":"ref5","first-page":"69","article-title":"Statistical Post-Processing at Wafersort &#x2013; an Alternative to Burn-in and a Manufacturable Solution to Test Limit Setting for submicron Technologies","author":"madge","year":"2002","journal-title":"VL8I Test Symposium"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.1998.670858"},{"key":"ref7","first-page":"81","article-title":"Evaluation of. Effectiveness of Median of Absolute Deviations Outlier Rejection-based IDDQ Testing for Bum-in Reduction","author":"sabade","year":"2002","journal-title":"VLSI Test Symposium"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1999.805800"},{"key":"ref9","first-page":"31","article-title":"Performance Comparison of VLV, ULV, and ECR Tests","author":"wanli","year":"2002","journal-title":"VLSI Test Symposium"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/92.902266"}],"event":{"name":"International Test Conference, 2003. ITC 2003.","location":"Washington, DC, USA"},"container-title":["International Test Conference, 2003. Proceedings. ITC 2003."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8970\/28457\/01270883.pdf?arnumber=1270883","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T20:51:06Z","timestamp":1489438266000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1270883\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/test.2003.1270883","relation":{},"subject":[]}}