{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,6]],"date-time":"2024-08-06T07:14:49Z","timestamp":1722928489485},"reference-count":18,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/test.2003.1271110","type":"proceedings-article","created":{"date-parts":[[2004,7,8]],"date-time":"2004-07-08T16:05:44Z","timestamp":1089302744000},"page":"1211-1220","source":"Crossref","is-referenced-by-count":11,"title":["Industrial experience with adoption of edt for low-cost test without concessions"],"prefix":"10.1109","volume":"1","author":[{"given":"F.","family":"Poehl","sequence":"first","affiliation":[]},{"given":"M.","family":"Beek","sequence":"additional","affiliation":[]},{"given":"N.","family":"Tamarapalli","sequence":"additional","affiliation":[]},{"given":"M.","family":"Kassab","sequence":"additional","affiliation":[]},{"given":"R.","family":"Arnold","sequence":"additional","affiliation":[]},{"given":"P.","family":"Muhmenthaler","sequence":"additional","affiliation":[]},{"given":"N.","family":"Mukherjee","sequence":"additional","affiliation":[]},{"given":"J.","family":"Rajski","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"17","doi-asserted-by":"publisher","DOI":"10.1145\/775832.776000"},{"journal-title":"Built-In Test for VLSI Pseudorandom Techniques","year":"1987","author":"bardell","key":"18"},{"key":"15","first-page":"57","article-title":"High Speed Ring Generators and Compactors of Test Data","author":"mrugalski","year":"2003","journal-title":"Proc VTS"},{"key":"16","first-page":"520","article-title":"A High-Level Pattern Development System promoting Industrial Concurrent Engineering","author":"krampl","year":"1991","journal-title":"Proc European Test Conf"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2002.1041773"},{"journal-title":"Test Pattern Compression for an Integrated Circuit Test Environment","year":"2001","author":"rajski","key":"14"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2002.1033794"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2002.1041774"},{"key":"3","first-page":"456","article-title":"Realizing the Benefits of Structual Test for Intel Microprocessors","author":"mayberry","year":"2002","journal-title":"Proc ITC"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2002.1041861"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2002.1041801"},{"key":"10","first-page":"151","article-title":"Test volume and application time reduction","author":"bayraktaroglu","year":"2001","journal-title":"Proc DAC"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.1995.512670"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1993.580117"},{"key":"5","first-page":"237","article-title":"LFSR-coded test patterns for scan designs","author":"koenemann","year":"1991","journal-title":"Proc European Test Conf"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/ETW.1999.804519"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2001.966672"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2001.966711"}],"event":{"name":"International Test Conference, 2003. ITC 2003.","location":"Washington, DC, USA"},"container-title":["International Test Conference, 2003. Proceedings. ITC 2003."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8970\/28457\/01271110.pdf?arnumber=1271110","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T21:51:01Z","timestamp":1489441861000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1271110\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":18,"URL":"https:\/\/doi.org\/10.1109\/test.2003.1271110","relation":{},"subject":[]}}