{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,19]],"date-time":"2025-03-19T12:55:39Z","timestamp":1742388939868},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2005]]},"DOI":"10.1109\/test.2005.1583967","type":"proceedings-article","created":{"date-parts":[[2006,2,6]],"date-time":"2006-02-06T15:51:40Z","timestamp":1139241100000},"page":"9 pp.-119","source":"Crossref","is-referenced-by-count":27,"title":["Testability features of the first-generation CELL processor"],"prefix":"10.1109","author":[{"given":"M.","family":"Riley","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"L.","family":"Bushard","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"N.","family":"Chelstrom","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"N.","family":"Kiryu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"S.","family":"Ferguson","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"3","article-title":"The Microarchitecture of the Streaming Processor for a CELL Processor","author":"flachs","year":"2005","journal-title":"Int Symp Solid State Circuits"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/CMPCON.1993.289645"},{"key":"10","article-title":"MC68HC11 Reference Manual","author":"motorola","year":"1989","journal-title":"Prentice Hall"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2005.1493930"},{"key":"7","article-title":"OPMISR: The Foundation for Compressed ATPG Vectors","author":"barnhart","year":"0","journal-title":"Proc International Test Conference 2001"},{"year":"0","author":"dasgupta","key":"6"},{"key":"5","doi-asserted-by":"crossref","DOI":"10.1109\/TEST.2001.966677","article-title":"99% test coverage using only LBIST on the 1GHz IBM S\/390 zSeries 900 Microprocessor","author":"kusko","year":"2001","journal-title":"IEEE International Test Conference"},{"key":"4","doi-asserted-by":"crossref","DOI":"10.1109\/TEST.1994.527938","article-title":"Balancing Structured and Ad-hoc Design for Test: Testing of the PowerPC 603TM Microprocessor","author":"hunter","year":"1994","journal-title":"IEEE International Test Conference"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.2003.1197639"},{"key":"8","first-page":"65","article-title":"Extending OPMISR beyond 10x Scan Test Efficiency","author":"barnhart","year":"2001","journal-title":"IEEE Design and Test of Computers"},{"year":"0","key":"11","article-title":"Standard Test Access Port and Boundary Scan Architecture, IEEE Standard 1149.1-2001"}],"event":{"name":"2005 IEEE International Test Conference","start":{"date-parts":[[2005,11,8]]},"location":"Austin, TX","end":{"date-parts":[[2005,11,8]]}},"container-title":["IEEE International Conference on Test, 2005."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/10560\/33431\/01583967.pdf?arnumber=1583967","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,2,2]],"date-time":"2020-02-02T22:25:57Z","timestamp":1580682357000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/1583967\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2005]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/test.2005.1583967","relation":{},"subject":[],"published":{"date-parts":[[2005]]}}}