{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,30]],"date-time":"2026-04-30T16:56:23Z","timestamp":1777568183254,"version":"3.51.4"},"reference-count":36,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/test.2005.1584063","type":"proceedings-article","created":{"date-parts":[[2006,2,6]],"date-time":"2006-02-06T15:51:40Z","timestamp":1139241100000},"page":"973-981","source":"Crossref","is-referenced-by-count":17,"title":["Simulation of transients caused by single-event upsets in combinational logic"],"prefix":"10.1109","author":[{"given":"K.","family":"Mohanram","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/23.903813"},{"key":"35","author":"rabaey","year":"2003","journal-title":"Digital Integrated Circuits"},{"key":"17","first-page":"99","article-title":"New methods for evaluating the impact of single event transients in VDSM ICs","author":"alexandrescu","year":"2002","journal-title":"Proc Int Symp Defect Fault Tolerance"},{"key":"36","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2000.852648"},{"key":"18","doi-asserted-by":"crossref","first-page":"111","DOI":"10.1109\/OLT.2003.1214376","article-title":"A model for transient fault propagation in combinatorial logic","author":"oman?a","year":"2003","journal-title":"Proc Intl On-line Testing Symposium"},{"key":"33","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2002.805441"},{"key":"15","year":"2003","journal-title":"MCNP - A General Monte Carlo N-Particle Transport Code Version 5"},{"key":"34","article-title":"Scaling and technology issues for soft error rates","author":"johnston","year":"2000","journal-title":"Proc Annual Topical Conference on Reliability"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1109\/12.544481"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/23.340536"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/23.490901"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1147\/rd.401.0109"},{"key":"12","author":"ziegler","year":"1985","journal-title":"The Stopping and Range of Ions in Solids"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1109\/43.137517"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996804"},{"key":"22","first-page":"719","article-title":"Fast timing simulation of transient faults in digital circuits","author":"dharchoudhury","year":"1994","journal-title":"Proc Intl Conference Computer-aided Design"},{"key":"23","first-page":"310","article-title":"Transistor sizing for radiation hardening","author":"zhou","year":"2004","journal-title":"Proc Intl Reliability Physics Symposium"},{"key":"24","doi-asserted-by":"publisher","DOI":"10.1109\/FTCS.1995.466977"},{"key":"25","doi-asserted-by":"publisher","DOI":"10.1109\/23.124140"},{"key":"26","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2005.35"},{"key":"27","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.1982.4336490"},{"key":"28","doi-asserted-by":"publisher","DOI":"10.1109\/RELPHY.1994.307864"},{"key":"29","doi-asserted-by":"crossref","DOI":"10.1007\/978-1-4615-0817-5_6","article-title":"Technology-based transformations","author":"murgai","year":"2002","journal-title":"Logic Synthesis and Verification"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/RELPHY.2002.996639"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/5.915372"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/4.391126"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1147\/rd.401.0003"},{"key":"30","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2003.813129"},{"key":"7","author":"sutherland","year":"1999","journal-title":"Logical Effort Designing Fast CMOS Circuits"},{"key":"6","first-page":"1","article-title":"Logical effort: Designing for speed on the back of an envelope","author":"sproull","year":"1991","journal-title":"Proc Conf Advanced Research in VLSI"},{"key":"32","doi-asserted-by":"crossref","first-page":"519","DOI":"10.1109\/23.856474","article-title":"Impact of CMOS technology scaling on the atmospheric neutron soft error rate","volume":"47","author":"hubert","year":"2000","journal-title":"IEEE Trans Nuclear Science"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2005.69"},{"key":"31","first-page":"2915","article-title":"A new approach for the prediction of the neutron-induced SEU rate","volume":"44","author":"vital","year":"1998","journal-title":"IEEE Trans Nuclear Science"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1557\/mrs2003.37"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1982.1051741"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/EDL.1980.25292"}],"event":{"name":"IEEE International Conference on Test, 2005.","location":"Charlotte, NC, USA"},"container-title":["IEEE International Conference on Test, 2005."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/10560\/33431\/01584063.pdf?arnumber=1584063","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,17]],"date-time":"2017-06-17T02:59:34Z","timestamp":1497668374000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1584063\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":36,"URL":"https:\/\/doi.org\/10.1109\/test.2005.1584063","relation":{},"subject":[]}}