{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,12]],"date-time":"2026-06-12T21:05:04Z","timestamp":1781298304855,"version":"3.54.1"},"reference-count":55,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2007]]},"DOI":"10.1109\/test.2007.4437660","type":"proceedings-article","created":{"date-parts":[[2008,1,29]],"date-time":"2008-01-29T15:41:30Z","timestamp":1201621290000},"page":"1-10","source":"Crossref","is-referenced-by-count":19,"title":["Power-aware test: Challenges and solutions"],"prefix":"10.1109","author":[{"family":"Srivaths Ravi","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"35","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2005.53"},{"key":"36","doi-asserted-by":"publisher","DOI":"10.1109\/VLSISOC.2006.313222"},{"key":"33","first-page":"217","article-title":"embedded cores and system-on-chip testing","author":"parekhji","year":"2006","journal-title":"Advances in Electronic Testing Challenges and Methodologies"},{"key":"34","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cdt:20060147"},{"key":"39","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2007.101"},{"key":"37","first-page":"58","article-title":"a new atpg method for efficient capture power reduction during scan testing","author":"wen","year":"2006","journal-title":"Proc VLSI Test Symp"},{"key":"38","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2006.297694"},{"key":"43","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2004.1268880"},{"key":"42","doi-asserted-by":"publisher","DOI":"10.1109\/43.736572"},{"key":"41","author":"synopsys","year":"2006","journal-title":"PrimePower Reference Guide"},{"key":"40","author":"synopsys","year":"2006","journal-title":"TetraMAX ATPG User Guide"},{"key":"22","doi-asserted-by":"publisher","DOI":"10.1109\/EDTC.1996.494361"},{"key":"23","doi-asserted-by":"publisher","DOI":"10.1145\/566408.566436"},{"key":"24","first-page":"677","article-title":"data-retention flip-flops for power-down applications","author":"mahmoodi","year":"2004","journal-title":"Proc IEEE International Symposium on Circuits and Systems (ISCAS)"},{"key":"25","article-title":"dftmax clinic for low power design","author":"au","year":"2007","journal-title":"Proc SNUG San Jose Conf (Online)"},{"key":"26","doi-asserted-by":"publisher","DOI":"10.1049\/el:20010463"},{"key":"27","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2005.87"},{"key":"28","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2007.61"},{"key":"29","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2004.842885"},{"key":"3","author":"raghunathan","year":"1997","journal-title":"High-Level Power Analysis and Optimization"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/9780470545058"},{"key":"1","year":"2002","journal-title":"Power Aware Design Methodologies"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2004.1387329"},{"key":"30","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2000.894297"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/IRWS.1999.830588"},{"key":"5","author":"jackson","year":"2007","journal-title":"Design-with-Test for Low-Power Devices"},{"key":"32","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2004.1386971"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.1993.313316"},{"key":"31","doi-asserted-by":"publisher","DOI":"10.1109\/DELTA.2002.994606"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2005.1583967"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2002.1003802"},{"key":"19","article-title":"glitch-a ware pattern generation and optimization framework for power-safe scan test","author":"devanathan","year":"2006","journal-title":"Proc VLSI Test Symposium"},{"key":"55","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2006.56"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2003.1271098"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2003.1270873"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2005.1493907"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1109\/54.84241"},{"key":"13","article-title":"arm powered, arm low-powered","author":"schuth","year":"2007","journal-title":"IQ online (ARM Inc )"},{"key":"14","year":"0"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2003.1271098"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/43.736181"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1999.805616"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1109\/ICVD.1994.282700"},{"key":"49","article-title":"methodology for low power test pattern generation using activity threshold control logic","author":"ravi","year":"2007","journal-title":"Proc Int Conf on Computer-Aided Design (ICCAD) (to appear)"},{"key":"48","year":"0"},{"key":"45","doi-asserted-by":"publisher","DOI":"10.1109\/12.663775"},{"key":"44","article-title":"dynamic shift frequency scaling of atpg patterns","author":"ramachandran","year":"2007","journal-title":"Proc SNUG India Conf (Online)"},{"key":"47","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.1998.670912"},{"key":"46","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1981.1675757"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2006.297695"},{"key":"51","year":"0"},{"key":"52","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.2000.843824"},{"key":"53","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.252"},{"key":"54","first-page":"552","article-title":"thermal-aware test scheduling and hot spot temperature minimization for core-based systems","author":"liu","year":"2005","journal-title":"Proc DFT"},{"key":"50","doi-asserted-by":"publisher","DOI":"10.1109\/92.335013"}],"event":{"name":"2007 IEEE International Test Conference","location":"Santa Clara, CA, USA","start":{"date-parts":[[2007,10,21]]},"end":{"date-parts":[[2007,10,26]]}},"container-title":["2007 IEEE International Test Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4437545\/4437546\/04437660.pdf?arnumber=4437660","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,6,12]],"date-time":"2026-06-12T20:53:53Z","timestamp":1781297633000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4437660\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007]]},"references-count":55,"URL":"https:\/\/doi.org\/10.1109\/test.2007.4437660","relation":{},"subject":[],"published":{"date-parts":[[2007]]}}}