{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T03:20:10Z","timestamp":1725506410197},"reference-count":24,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2008,10]]},"DOI":"10.1109\/test.2008.4700552","type":"proceedings-article","created":{"date-parts":[[2008,12,10]],"date-time":"2008-12-10T17:55:58Z","timestamp":1228931758000},"page":"1-10","source":"Crossref","is-referenced-by-count":1,"title":["DFX of a 3<sup>rd<\/sup> Generation, 16-core\/32-thread UltraSPARC- CMT Microprocessor"],"prefix":"10.1109","author":[{"given":"I.","family":"Parulkar","sequence":"first","affiliation":[]},{"given":"S.","family":"Anandakumar","sequence":"additional","affiliation":[]},{"given":"G.","family":"Agarwal","sequence":"additional","affiliation":[]},{"given":"G.","family":"Liu","sequence":"additional","affiliation":[]},{"given":"K.","family":"Rajan","sequence":"additional","affiliation":[]},{"given":"F.","family":"Chiu","sequence":"additional","affiliation":[]},{"given":"R.","family":"Pendurkar","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2002.1011170"},{"key":"22","article-title":"testing high-speed, large scale implementation of serdes i\/os on chips used in throughput computing systems","author":"parulkar","year":"2005","journal-title":"36th IEEE International Test Conference"},{"key":"17","article-title":"the sparc architecture manual - version 9","author":"weaver","year":"0","journal-title":"SPARC International Inc"},{"key":"23","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2006.297675"},{"journal-title":"On-Chip Testing of Embedded Arrays Using Address Space Identifier Bus in SPARC Architectures","year":"2006","author":"parulkar","key":"18"},{"key":"24","doi-asserted-by":"publisher","DOI":"10.1145\/1039511.1039537"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2000.894254"},{"key":"16","article-title":"silicon debug of a high performance server chip-set and a third generation, 16 core\/32 thread sparc cmt processor","author":"parulkar","year":"2009","journal-title":"IEEE Design & Test of Computers"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2007.4437561"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2007.4437584"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2005.1583967"},{"key":"12","article-title":"testing of ultrasparc t1 microprocessor and its challenges","author":"tan","year":"2006","journal-title":"Proc of International Test Conference"},{"key":"21","article-title":"a multi-dimensional approach to solving test challenges of ultra-high bandwidth serdes interfaces","author":"parulkar","year":"2005","journal-title":"Proceedings of VLSI Test Symposium"},{"key":"3","article-title":"microprocessor test and test tool methodology for the 500mhz ibm s\/390 g5 chip","author":"kusko","year":"1998","journal-title":"Proc of International Test Conference"},{"journal-title":"Built-In Delf-Test of 3-D Semiconductor Memories with Internal Data Transfer","year":"0","author":"parulkar","key":"20"},{"key":"2","first-page":"5","article-title":"implementation of a third-generation 16-core 32-thread cmt sparc processor","author":"konstadinidis","year":"2008","journal-title":"Proc of ISSCC"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2008.4523067"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2002.1041825"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2002.1041868"},{"key":"6","article-title":"test and on-line debug capabilities of ultrasparctm-iii microprocessor","author":"golshan","year":"2000","journal-title":"Proc of International Test Conference"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2000.894200"},{"key":"4","article-title":"the test and debug features of the amdk7 microprocessor","author":"wood","year":"1999","journal-title":"Proc of International Test Conference"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2004.1386935"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2003.1270906"}],"event":{"name":"2008 IEEE International Test Conference","start":{"date-parts":[[2008,10,28]]},"location":"Santa Clara, CA","end":{"date-parts":[[2008,10,30]]}},"container-title":["2008 IEEE International Test Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4690905\/4700527\/04700552.pdf?arnumber=4700552","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,17]],"date-time":"2017-03-17T16:55:28Z","timestamp":1489769728000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4700552\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,10]]},"references-count":24,"URL":"https:\/\/doi.org\/10.1109\/test.2008.4700552","relation":{},"subject":[],"published":{"date-parts":[[2008,10]]}}}