{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,21]],"date-time":"2025-05-21T05:28:21Z","timestamp":1747805301560,"version":"3.28.0"},"reference-count":24,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,11]]},"DOI":"10.1109\/test.2010.5699256","type":"proceedings-article","created":{"date-parts":[[2011,1,21]],"date-time":"2011-01-21T20:20:08Z","timestamp":1295641208000},"page":"1-8","source":"Crossref","is-referenced-by-count":3,"title":["Lessons from at-speed scan deployment on an Intel® Itanium® microprocessor"],"prefix":"10.1109","author":[{"given":"Pankaj","family":"Pant","sequence":"first","affiliation":[]},{"given":"Joshua","family":"Zelman","sequence":"additional","affiliation":[]},{"given":"Glenn","family":"Colon-Bonet","sequence":"additional","affiliation":[]},{"given":"Jennifer","family":"Flint","sequence":"additional","affiliation":[]},{"given":"Steve","family":"Yurash","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","article-title":"Transition ATPG: An Important Tool in Post-Silicon Electrical Characterization","author":"pant","year":"2008","journal-title":"North Atlantic Test Workshop"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2003.1271098"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/DELTA.2008.25"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.825120"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/EMAP.2006.4430591"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2008.4700574"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2008.4681663"},{"key":"ref17","first-page":"93","article-title":"Managing Process Variation in Intel's 45nm CMOS Technology","volume":"12","author":"kuhn","year":"2008","journal-title":"Intel Technology Journal"},{"key":"ref18","article-title":"Advances in Electronic Testing","volume":"3","author":"josephson","year":"2006"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2001.966662"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2001.966682"},{"article-title":"Nanometer Technology Designs: High-Quality Delay Tests","year":"2007","author":"tehranipoor","key":"ref3"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2009.46"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2005.1583984"},{"key":"ref8","article-title":"On Correlating Structural Tests with Functional Tests for Speed Binning of High Performance Design","author":"zeng","year":"2004","journal-title":"International Test Conference"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2000.894231"},{"key":"ref2","doi-asserted-by":"crossref","DOI":"10.1007\/978-1-4615-5597-1","article-title":"Delay Fault Testing for VLSI Circuits","author":"krstic","year":"1998"},{"key":"ref1","article-title":"Scan Delay Testing of Nanometer SOCs","author":"singh","year":"2007","journal-title":"Tutorial VLSI Test Symposium"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2009.5355655"},{"key":"ref20","article-title":"A Scalable X86 CPU Design for 90nm Process","author":"schutz","year":"2004","journal-title":"International Solid-State Circuits Conference"},{"key":"ref22","first-page":"37","article-title":"System-Level Validation of the Intel Pentium-M Processor","volume":"7","author":"silas","year":"2003","journal-title":"Intel Technology Journal"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2009.5355620"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2009.5355542"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2007.4437560"}],"event":{"name":"2010 IEEE International Test Conference (ITC)","start":{"date-parts":[[2010,11,2]]},"location":"Austin, TX, USA","end":{"date-parts":[[2010,11,4]]}},"container-title":["2010 IEEE International Test Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5684496\/5699173\/05699256.pdf?arnumber=5699256","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T18:44:23Z","timestamp":1497897863000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5699256\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,11]]},"references-count":24,"URL":"https:\/\/doi.org\/10.1109\/test.2010.5699256","relation":{},"subject":[],"published":{"date-parts":[[2010,11]]}}}