{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T15:13:34Z","timestamp":1730301214637,"version":"3.28.0"},"reference-count":16,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,9]]},"DOI":"10.1109\/test.2011.6139165","type":"proceedings-article","created":{"date-parts":[[2012,1,31]],"date-time":"2012-01-31T16:37:40Z","timestamp":1328027860000},"page":"1-9","source":"Crossref","is-referenced-by-count":2,"title":["Adaptive parametric BIST of high-speed parallel I\/Os via standard boundary scan"],"prefix":"10.1109","author":[{"given":"Stephen","family":"Sunter","sequence":"first","affiliation":[]},{"given":"Aubin","family":"Roy","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"year":"2003","article-title":"Guidelines for part average testing","key":"ref10"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.1109\/TEST.2010.5699243"},{"year":"0","journal-title":"Signalyzer datasheet","key":"ref12"},{"year":"2009","journal-title":"National Semiconductor","article-title":"LMK03000 Family","key":"ref13"},{"year":"2009","journal-title":"Stratix-II devices data sheet","key":"ref14"},{"doi-asserted-by":"publisher","key":"ref15","DOI":"10.1109\/TEST.2005.1583976"},{"key":"ref16","first-page":"40","author":"galloway","year":"0","journal-title":"EDN"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1109\/TEST.2003.1271089"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1109\/TEST.1998.743140"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1109\/TEST.2006.297697"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1109\/TEST.2001.966635"},{"key":"ref8","article-title":"FPGA Vernier digital-to-time converter with 1.58 ps resolution and 59.3 minutes operation range","volume":"57","author":"chen","year":"2010","journal-title":"IEEE Trans Circ Syst -I"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.1109\/JSSC.2010.2040306"},{"key":"ref2","first-page":"1","article-title":"IEEE standard test access port and boundary-scan architecture","year":"0","journal-title":"The IEEE Inc 345 East 47th St"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1109\/TEST.2010.5699207"},{"year":"2009","article-title":"International technology roadmap for semiconductors, 2009 Edition, Test and test equipment","key":"ref9"}],"event":{"name":"2011 IEEE International Test Conference (ITC)","start":{"date-parts":[[2011,9,20]]},"location":"Anaheim, CA, USA","end":{"date-parts":[[2011,9,22]]}},"container-title":["2011 IEEE International Test Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6132473\/6139126\/06139165.pdf?arnumber=6139165","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T15:17:42Z","timestamp":1490109462000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6139165\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,9]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/test.2011.6139165","relation":{},"subject":[],"published":{"date-parts":[[2011,9]]}}}