{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,21]],"date-time":"2025-05-21T06:10:03Z","timestamp":1747807803073,"version":"3.41.0"},"reference-count":30,"publisher":"IEEE","license":[{"start":{"date-parts":[[2012,11,1]],"date-time":"2012-11-01T00:00:00Z","timestamp":1351728000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2012,11,1]],"date-time":"2012-11-01T00:00:00Z","timestamp":1351728000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,11]]},"DOI":"10.1109\/test.2012.6401582","type":"proceedings-article","created":{"date-parts":[[2013,1,10]],"date-time":"2013-01-10T00:26:46Z","timestamp":1357777606000},"page":"1-10","source":"Crossref","is-referenced-by-count":2,"title":["A design flow to maximize yield\/area of physical devices via redundancy"],"prefix":"10.1109","author":[{"given":"Mohammad","family":"Mirza-Aghatabar","sequence":"first","affiliation":[{"name":"Ming Hsieh Department of Electrical Engineering, University of Southern California, Los Angeles, CA USA"}]},{"given":"Melvin A.","family":"Breuer","sequence":"additional","affiliation":[{"name":"Ming Hsieh Department of Electrical Engineering, University of Southern California, Los Angeles, CA USA"}]},{"given":"Sandeep K.","family":"Gupta","sequence":"additional","affiliation":[{"name":"Ming Hsieh Department of Electrical Engineering, University of Southern California, Los Angeles, CA USA"}]}],"member":"263","reference":[{"volume-title":"ITRS","year":"2011","key":"ref1"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/NANO.2003.1230947"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-74309-5_12"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1147\/rd.243.0398"},{"key":"ref5","doi-asserted-by":"crossref","first-page":"43","DOI":"10.1145\/1454115.1454124","article-title":"Core cannibalization architecture: improving lifetime chip performance for multicore processors in the presence of hard faults","author":"Romanescu","year":"2008","journal-title":"Int\u2019l. Conf. on Parallel Architectures and Compilation Techniques"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1980.1675498"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1982.1051803"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2012.6187563"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISVD.1991.185101"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1983.12619"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/CITISIA.2009.5224225"},{"volume-title":"OpenSPARC","year":"2011","key":"ref12"},{"article-title":"Digital Systems Testing and Testable Design","year":"1990","author":"Abramovici","key":"ref13"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/12.338099"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.1993.313363"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1017\/CBO9780511816321"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2010.51"},{"volume-title":"shMetis","year":"2011","key":"ref18"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2010.5456998"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/IWIA.2010.11"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/DFTVS.1991.199948"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ARRAYS.1988.18100"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2009.40"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2003.1240944"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.28"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2005.8"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.44"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2010.205"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1016\/b978-0-444-51947-4.x5000-2"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevB.77.033418"}],"event":{"name":"2012 IEEE International Test Conference (ITC)","start":{"date-parts":[[2012,11,5]]},"location":"Anaheim, CA, USA","end":{"date-parts":[[2012,11,8]]}},"container-title":["2012 IEEE International Test Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6387511\/6401510\/06401582.pdf?arnumber=6401582","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,5,21]],"date-time":"2025-05-21T05:29:32Z","timestamp":1747805372000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/6401582\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,11]]},"references-count":30,"URL":"https:\/\/doi.org\/10.1109\/test.2012.6401582","relation":{},"subject":[],"published":{"date-parts":[[2012,11]]}}}