{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T04:29:15Z","timestamp":1725510555305},"reference-count":19,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,9]]},"DOI":"10.1109\/test.2013.6651908","type":"proceedings-article","created":{"date-parts":[[2013,11,11]],"date-time":"2013-11-11T19:57:38Z","timestamp":1384199858000},"page":"1-8","source":"Crossref","is-referenced-by-count":12,"title":["Fault mitigation strategies for CUDA GPUs"],"prefix":"10.1109","author":[{"given":"Stefano","family":"Di Carlo","sequence":"first","affiliation":[]},{"given":"Giulio","family":"Gambardella","sequence":"additional","affiliation":[]},{"given":"Ippazio","family":"Martella","sequence":"additional","affiliation":[]},{"given":"Paolo","family":"Prinetto","sequence":"additional","affiliation":[]},{"given":"Daniele","family":"Rolfo","sequence":"additional","affiliation":[]},{"given":"Pascal","family":"Trotta","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"year":"0","key":"19"},{"key":"17","first-page":"33","article-title":"A software-based self test of CUDA Fermi GPUs","author":"di carlo","year":"2013","journal-title":"Proc of 18th Eu-ropean Test Symposium"},{"year":"0","key":"18"},{"year":"0","key":"15"},{"year":"0","key":"16"},{"key":"13","first-page":"311","article-title":"Matrix multiplication on gpus with on-line fault tol-erance","author":"ding","year":"2011","journal-title":"Proc of 9th IEEE International Sympo-sium on Parallel and Distributed Processing with Ap-plications"},{"year":"0","key":"14"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1984.1676475"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1524\/itit.2010.0593"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/CIISP.2007.369313"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cta.2009.0628"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCEA.2010.100"},{"key":"10","first-page":"1895","article-title":"HiAL-Ckpt: A hierarchical application-level checkpointing for cpu-gpu hybrid systems","author":"xu","year":"2010","journal-title":"Proc of 5th Interna-tional Conference on Computer Science and Educa-tion (ICCSE)"},{"key":"7","first-page":"141","article-title":"Ex-ploiting structural redundancy of simd accelerators for their built-in self-testing\/diagnosis and reconfigu-ration","author":"strano","year":"2011","journal-title":"Proc of IEEE International Conference on Application-Specific Systems Architectures and Pro-cessors"},{"key":"6","first-page":"137","article-title":"An improved approach to fault tolerant rank order filtering on a simd mesh processor","author":"kim","year":"1995","journal-title":"Proc of IEEE InternationalWork-shop on Defect and Fault Tolerance in VLSI Systems"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/71.689442"},{"year":"0","key":"4"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/12.494109"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/30.793429"}],"event":{"name":"2013 IEEE International Test Conference (ITC)","start":{"date-parts":[[2013,9,6]]},"location":"Anaheim, CA, USA","end":{"date-parts":[[2013,9,13]]}},"container-title":["2013 IEEE International Test Conference (ITC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6646057\/6651860\/06651908.pdf?arnumber=6651908","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,23]],"date-time":"2017-03-23T01:44:07Z","timestamp":1490233447000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6651908\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,9]]},"references-count":19,"URL":"https:\/\/doi.org\/10.1109\/test.2013.6651908","relation":{},"subject":[],"published":{"date-parts":[[2013,9]]}}}