{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T08:48:43Z","timestamp":1725612523079},"reference-count":19,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,10]]},"DOI":"10.1109\/test.2015.7342382","type":"proceedings-article","created":{"date-parts":[[2015,12,3]],"date-time":"2015-12-03T21:11:39Z","timestamp":1449177099000},"page":"1-9","source":"Crossref","is-referenced-by-count":9,"title":["On generating high quality tests based on cell functions"],"prefix":"10.1109","author":[{"given":"Xijiang","family":"Lin","sequence":"first","affiliation":[]},{"given":"Sudhakar M.","family":"Reddy","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","first-page":"185","article-title":"Test Generation to Detect Transistor Stuck-open Faults and Transition Delay Faults","author":"devtaprasanna","year":"0","journal-title":"Proc ETS"},{"key":"ref11","article-title":"Gate Exhaustive Testing","author":"cho","year":"0","journal-title":"Proc lTC 2005"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2014.2323216"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1973.5009174"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/T-C.1973.223638"},{"key":"ref15","first-page":"76","article-title":"A Complement-based Fast Algorithms to Generate Universal Test Sets for Combinational Function Blocks","author":"chen","year":"0","journal-title":"Proc ATS"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1984.1585845"},{"key":"ref17","article-title":"Digital Systems Testing and Testable Design","author":"abramovici","year":"1990","journal-title":"IEEE Press New York"},{"key":"ref18","article-title":"Defect-based Tests: A Key Enabler for Successful Migration to Structural Test","author":"sengupta","year":"0","journal-title":"Intel Technology Journal Q4 1999"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2015.7116301"},{"key":"ref4","first-page":"342","article-title":"Model for Delay Faults Based Upon Paths","author":"smith","year":"0","journal-title":"Proc LTC"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1988.207853"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2008.4484747"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1991.519711"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/43.177407"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1993.470718"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.1987.295104"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/T-C.1974.224020"},{"key":"ref9","article-title":"Test Generation for Interconnect Opens","author":"lin","year":"0","journal-title":"Proc Intl Test Conf"}],"event":{"name":"2015 IEEE International Test Conference (ITC)","start":{"date-parts":[[2015,10,6]]},"location":"Anaheim, CA, USA","end":{"date-parts":[[2015,10,8]]}},"container-title":["2015 IEEE International Test Conference (ITC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7331771\/7342364\/07342382.pdf?arnumber=7342382","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,24]],"date-time":"2017-03-24T21:55:18Z","timestamp":1490392518000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7342382\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,10]]},"references-count":19,"URL":"https:\/\/doi.org\/10.1109\/test.2015.7342382","relation":{},"subject":[],"published":{"date-parts":[[2015,10]]}}}