{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,3]],"date-time":"2026-05-03T05:43:37Z","timestamp":1777787017088,"version":"3.51.4"},"reference-count":45,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2017,7,1]],"date-time":"2017-07-01T00:00:00Z","timestamp":1498867200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"name":"Center for Low Energy Systems Technology (LEAST)"},{"DOI":"10.13039\/100007245","name":"MARCO","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100007245","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000185","name":"DARPA","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100000185","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Emerg. Topics Comput."],"published-print":{"date-parts":[[2017,7,1]]},"DOI":"10.1109\/tetc.2016.2559159","type":"journal-article","created":{"date-parts":[[2016,4,28]],"date-time":"2016-04-28T12:19:59Z","timestamp":1461845999000},"page":"340-352","source":"Crossref","is-referenced-by-count":37,"title":["Tunnel FET Current Mode Logic for DPA-Resilient Circuit Designs"],"prefix":"10.1109","volume":"5","author":[{"given":"Yu","family":"Bi","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kaveh","family":"Shamsi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jiann-Shiun","family":"Yuan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8791-0597","authenticated-orcid":false,"given":"Yier","family":"Jin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Michael","family":"Niemier","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xiaobo Sharon","family":"Hu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1007\/s13389-014-0092-8"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1587\/transfun.E94.A.1318"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/MICROW.2012.15"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/RME.2005.1542960"},{"key":"ref31","article-title":"Dynamic current mode logic family","author":"elmasry","year":"2000"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2011.2158343"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-17401-8_14"},{"key":"ref36","article-title":"PTM model","year":"2014"},{"key":"ref35","article-title":"III-V tunnel FET model","author":"liu","year":"2015"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-19074-2_8"},{"key":"ref10","first-page":"403","article-title":"A dynamic and differential CMOS logic with signal independent power consumption to withstand differential power analysis on smart cards","author":"tiri","year":"0","journal-title":"Proc 28th Eur Solid-State Circuits Conf"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2014.6855581"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2014.69"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/2816818"},{"key":"ref13","first-page":"54","article-title":"MOS current mode logic MCML circuit for low-power GHZ processors","volume":"36","author":"yamashina","year":"1995","journal-title":"NEC Res Develop"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2007.79"},{"key":"ref15","first-page":"843","article-title":"A generic standard cell design methodology for differential circuit styles","author":"badel","year":"0","journal-title":"Proc Des Autom Test Eur"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/2024724.2024947"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1007\/11506447_10"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1007\/11556930_56"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2007.4430304"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/ULIS.2014.6813897"},{"key":"ref4","article-title":"The simon and speck families of lightweight block ciphers","author":"beaulieu","year":"2013"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/16.887014"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-74619-5_13"},{"key":"ref6","first-page":"388","article-title":"Differential power analysis","author":"kocher","year":"0","journal-title":"Proc Annu Int Cryptol Conf Adv Cryptol"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1016\/j.sse.2014.12.002"},{"key":"ref5","first-page":"272","article-title":"Katan and ktantan – a family of small and efficient hardware-oriented block ciphers","author":"canni\u00e8re","year":"0","journal-title":"Proc 4th Int Workshop Cryptographic Hardw Embedded Syst"},{"key":"ref8","first-page":"309","article-title":"An implementation of DES and AES, secure against some attacks","author":"akkar","year":"0","journal-title":"Proc Int Workshop Cryptogr Hardware Embedded Syst"},{"key":"ref7","article-title":"Design and validation strategies for obtaining assurance in countermeasures to power analysis and related","author":"kocher","year":"0","journal-title":"Attacks in the proceedings of the NIST Physical Security Workshop"},{"key":"ref2","first-page":"450","article-title":"Present: An ultra-lightweight block cipher","author":"bogdanov","year":"0","journal-title":"Proc Int Workshop Cryptogr Hardware Embedded Syst"},{"key":"ref9","first-page":"64","article-title":"Power attack resistant cryptosystem design: A dynamic voltage and frequency switching approach","volume":"3","author":"yang","year":"0","journal-title":"Proc Des Autom Test Eur"},{"key":"ref1","year":"2001","journal-title":"FIPS PUB 197 Advanced Encryption Standard (AES)"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-SoC.2014.7004179"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2008.217"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2010.2070470"},{"key":"ref21","first-page":"1538","article-title":"Leverage Emerging Technologies for DPA-Resilient Block Cipher Design","author":"yu bi","year":"2016","journal-title":"Design Automation Test in Europe Conference Exhibition (DATE)"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2003.1190590"},{"key":"ref24","first-page":"124","article-title":"Comparison of performance, switching energy and process variations for the TFET and MOSFET in logic","author":"avci","year":"0","journal-title":"Proc Symp VLSI Technol"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2031651"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/JEDS.2014.2326622"},{"key":"ref44","article-title":"The Galois counter mode of operation","author":"mcgrew","year":"2005","journal-title":"NIST"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2014.2342371"},{"key":"ref43","doi-asserted-by":"crossref","first-page":"1105","DOI":"10.1109\/TCAD.2014.2307002","article-title":"Efficient and concurrent reliable realization of the secure cryptographic SHA-3 algorithm","volume":"33","author":"bayat-sarmadi","year":"2014","journal-title":"IEEE Trans Comput -Aided Des Integr Circuits Syst"},{"key":"ref25","first-page":"32.6.1","article-title":"Novel gate-recessed vertical INAS\/GASB TFETS with record high ion of 180 $\\mu a$ \/ $\\mu m$ at vds$=$ 0.5 v","author":"zhou","year":"2012","journal-title":"Proc IEEE Int Electron Devices Meet"}],"container-title":["IEEE Transactions on Emerging Topics in Computing"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6245516\/8023987\/07460122.pdf?arnumber=7460122","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T11:41:34Z","timestamp":1641987694000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7460122\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,7,1]]},"references-count":45,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/tetc.2016.2559159","relation":{},"ISSN":["2168-6750"],"issn-type":[{"value":"2168-6750","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017,7,1]]}}}