{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,11]],"date-time":"2025-11-11T15:54:30Z","timestamp":1762876470666,"version":"3.37.3"},"reference-count":22,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2024,4,1]],"date-time":"2024-04-01T00:00:00Z","timestamp":1711929600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2024,4,1]],"date-time":"2024-04-01T00:00:00Z","timestamp":1711929600000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2024,4,1]],"date-time":"2024-04-01T00:00:00Z","timestamp":1711929600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,4,1]],"date-time":"2024-04-01T00:00:00Z","timestamp":1711929600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"NSF","award":["SaTC"],"award-info":[{"award-number":["SaTC"]}]},{"name":"Finding and Mitigating Side-channel Leakage in Embedded Architectures","award":["1931639"],"award-info":[{"award-number":["1931639"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Emerg. Topics Comput."],"published-print":{"date-parts":[[2024,4]]},"DOI":"10.1109\/tetc.2023.3268303","type":"journal-article","created":{"date-parts":[[2023,4,24]],"date-time":"2023-04-24T18:30:47Z","timestamp":1682361047000},"page":"496-507","source":"Crossref","is-referenced-by-count":1,"title":["Gate-Level Side-Channel Leakage Ranking With Architecture Correlation Analysis"],"prefix":"10.1109","volume":"12","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-8450-1037","authenticated-orcid":false,"given":"Pantea","family":"Kiaei","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering, Worcester Polytechnique Institute, Worcester, MA, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8077-051X","authenticated-orcid":false,"given":"Yuan","family":"Yao","sequence":"additional","affiliation":[{"name":"Bradley Department of Electrical and Computer Engineering, Virginia Polytechnique Institute and State University, Blacksburg, VA, USA"}]},{"ORCID":"https:\/\/orcid.org\/0009-0001-2334-6130","authenticated-orcid":false,"given":"Zhenyuan","family":"Liu","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Worcester Polytechnique Institute, Worcester, MA, USA"}]},{"given":"Nicole","family":"Fern","sequence":"additional","affiliation":[{"name":"Riscure North America, San Francisco, CA, USA"}]},{"given":"Cees-Bart","family":"Breunesse","sequence":"additional","affiliation":[{"name":"Riscure North America, San Francisco, CA, USA"}]},{"given":"Jasper","family":"Van Woudenberg","sequence":"additional","affiliation":[{"name":"Riscure North America, San Francisco, CA, USA"}]},{"given":"Kate","family":"Gillis","sequence":"additional","affiliation":[{"name":"Intrinsix Corp., Marlborough, MA, USA"}]},{"given":"Alex","family":"Dich","sequence":"additional","affiliation":[{"name":"Intrinsix Corp., Marlborough, MA, USA"}]},{"given":"Peter","family":"Grossmann","sequence":"additional","affiliation":[{"name":"Zero ASIC Corporation, Lexington, MA, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4586-5476","authenticated-orcid":false,"given":"Patrick","family":"Schaumont","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Worcester Polytechnique Institute, Worcester, MA, USA"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/11935308_38"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-662-44709-3_31"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-02617-1_34"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/3322483"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/HOST45689.2020.9300271"},{"key":"ref6","article-title":"Pre-silicon architecture correlation analysis (PACA): Identifying and mitigating the source of side-channel leakage at gate-level","volume":"2021","author":"Yao","year":"2021","journal-title":"IACR Cryptol. ePrint Arch."},{"article-title":"SoK: Design tools for side-channel-aware implementations","year":"2021","author":"Buhan","key":"ref7"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/978-0-387-35691-4_45"},{"key":"ref9","first-page":"199","article-title":"Towards practical tools for side channel aware software engineering: \u2018grey box\u2019 modelling for instruction leakages","volume-title":"Proc. USENIX Secur. Symp.","author":"McCann"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.14722\/ndss.2021.23137"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA47549.2020.00016"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1007\/s13389-020-00233-8"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/3383445"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/icsamos.2007.4285753"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD45719.2019.8942173"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2019.8758600"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/host45689.2020.9300263"},{"key":"ref18","first-page":"11","article-title":"COCO: Co-design and co-verification of masked software implementations on CPUs","volume-title":"Proc. 30th USENIX Secur. Symp.","author":"Gigerl"},{"key":"ref19","first-page":"115","article-title":"A testing methodology for side-channel resistance validation","volume-title":"Proc. NIST Non-Invasive Attack Testing Workshop","author":"Goodwill"},{"article-title":"Saidoyoki: Evaluating side-channel leakage in pre- and post-silicon setting","year":"2021","author":"Kiaei","key":"ref20"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/hst.2019.8740839"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/3526241.3530337"}],"container-title":["IEEE Transactions on Emerging Topics in Computing"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielam\/6245516\/10552369\/10107726-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6245516\/10552369\/10107726.pdf?arnumber=10107726","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,6,25]],"date-time":"2024-06-25T20:28:30Z","timestamp":1719347310000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10107726\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,4]]},"references-count":22,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tetc.2023.3268303","relation":{},"ISSN":["2168-6750","2376-4562"],"issn-type":[{"type":"electronic","value":"2168-6750"},{"type":"electronic","value":"2376-4562"}],"subject":[],"published":{"date-parts":[[2024,4]]}}}