{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,23]],"date-time":"2025-05-23T04:48:59Z","timestamp":1747975739707,"version":"3.37.3"},"reference-count":43,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2023,4,1]],"date-time":"2023-04-01T00:00:00Z","timestamp":1680307200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2023,4,1]],"date-time":"2023-04-01T00:00:00Z","timestamp":1680307200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,4,1]],"date-time":"2023-04-01T00:00:00Z","timestamp":1680307200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100002457","name":"Chosun University","doi-asserted-by":"publisher","award":["K949856042"],"award-info":[{"award-number":["K949856042"]}],"id":[{"id":"10.13039\/501100002457","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Evol. Computat."],"published-print":{"date-parts":[[2023,4]]},"DOI":"10.1109\/tevc.2022.3169641","type":"journal-article","created":{"date-parts":[[2022,4,22]],"date-time":"2022-04-22T19:37:19Z","timestamp":1650656239000},"page":"281-295","source":"Crossref","is-referenced-by-count":1,"title":["On the Evolutionary Synthesis of Fault-Resilient Digital Circuits"],"prefix":"10.1109","volume":"27","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-1502-8607","authenticated-orcid":false,"given":"Umar","family":"Afzaal","sequence":"first","affiliation":[{"name":"Department of Computer Engineering, Chosun University, Gwangju, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5392-3595","authenticated-orcid":false,"given":"Abdus Sami","family":"Hassan","sequence":"additional","affiliation":[{"name":"Department of Computer Engineering, Chosun University, Gwangju, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3393-5211","authenticated-orcid":false,"given":"Muhammad","family":"Usman","sequence":"additional","affiliation":[{"name":"Department of Computer Engineering, Chosun University, Gwangju, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5166-0629","authenticated-orcid":false,"given":"Jeong-A","family":"Lee","sequence":"additional","affiliation":[{"name":"Department of Computer Engineering, Chosun University, Gwangju, South Korea"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2014.6908568"},{"volume-title":"Self-Checking and Fault-Tolerant Digital Design","year":"2001","author":"Lala","key":"ref2"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2010.120"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2018.2824821"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2016.2634781"},{"key":"ref6","article-title":"Automatic synthesis of totally self-checking circuits","volume-title":"arXiv:1901.07023","author":"Garvie","year":"2019"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/EWDTS.2015.7493130"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ICTC49870.2020.9289420"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TR.2016.2604918"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1007\/s10836-018-5764-3"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1049\/el.2018.1042"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.3390\/electronics8030332"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/CIRSYSSIM.2017.8023171"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/1142155.1142167"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2016.2541700"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2016.2632722"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/OLT.2004.1319674"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ReConFig.2011.37"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/AHS.2014.6880156"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2003.1270849"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/5.726791"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/MSP.2012.2211477"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/DSD51259.2020.00089"},{"key":"ref24","first-page":"1","article-title":"Yosys\u2014A free Verilog synthesis suite","volume-title":"Proc. 21st Austrian Workshop Microelectron. (Austrochip)","author":"Wolf"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-14295-6_5"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TEVC.2014.2336175"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.25103\/jestr.095.13"},{"article-title":"SIS: A system for sequential circuit synthesis","year":"1992","author":"Sentovich","key":"ref28"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/1388969.1389075"},{"issue":"3","key":"ref30","doi-asserted-by":"crossref","first-page":"259","DOI":"10.1023\/A:1010066330916","article-title":"Principles in the evolutionary design of digital circuits\u2014Part II","volume":"1","author":"Miller","year":"2000","journal-title":"Genet. Program. Evol. Mach."},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/NABIC.2009.5393690"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1049\/iet-gtd.2017.1992"},{"volume-title":"Nature-Inspired Optimization Algorithms","year":"2020","author":"Yang","key":"ref33"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.25080\/Majora-7b98e3ed-004"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/EDTC.1997.582422"},{"volume-title":"PrecoSAT","year":"2021","key":"ref36"},{"key":"ref37","first-page":"75","article-title":"CNF encodings","volume-title":"Handbook of Satisfiability","volume":"185","author":"Prestwich","year":"2009"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/CEC.2012.6256649"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/43.536711"},{"volume-title":"Pareto.py: A Epsilon-Nondomination Sorting Routine","year":"2013","author":"Woodruff","key":"ref40"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1162\/106365605774666895"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4614-2113-9"},{"volume-title":"ReCkt: A Library of Reliable Adders and Multipliers","year":"2021","key":"ref43"}],"container-title":["IEEE Transactions on Evolutionary Computation"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4235\/10089199\/09761994.pdf?arnumber=9761994","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,22]],"date-time":"2024-01-22T21:09:34Z","timestamp":1705957774000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9761994\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,4]]},"references-count":43,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tevc.2022.3169641","relation":{},"ISSN":["1089-778X","1089-778X","1941-0026"],"issn-type":[{"type":"print","value":"1089-778X"},{"type":"print","value":"1089-778X"},{"type":"electronic","value":"1941-0026"}],"subject":[],"published":{"date-parts":[[2023,4]]}}}