{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,3]],"date-time":"2025-12-03T17:41:05Z","timestamp":1764783665309},"reference-count":33,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2015,5,1]],"date-time":"2015-05-01T00:00:00Z","timestamp":1430438400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Ind. Electron."],"published-print":{"date-parts":[[2015,5]]},"DOI":"10.1109\/tie.2014.2362888","type":"journal-article","created":{"date-parts":[[2014,10,14]],"date-time":"2014-10-14T18:31:46Z","timestamp":1413311506000},"page":"2952-2961","source":"Crossref","is-referenced-by-count":42,"title":["Architecture of FPGA Embedded Multiprocessor Programmable Controller"],"prefix":"10.1109","volume":"62","author":[{"given":"Zbigniew","family":"Hajduk","sequence":"first","affiliation":[]},{"given":"Bartosz","family":"Trybus","sequence":"additional","affiliation":[]},{"given":"Jan","family":"Sadolewski","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref33","year":"2013","journal-title":"Zynq-7000 All Programmable SoC Overview San Jose CA USA"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-38658-9_26"},{"key":"ref31","doi-asserted-by":"crossref","DOI":"10.1007\/978-3-540-89927-3","article-title":"Analytical method in fuzzy modeling and control","volume":"241","author":"kluska","year":"2009","journal-title":"Studies in Fuzziness and Soft Computing"},{"key":"ref30","year":"2007","journal-title":"128-Bit Processor Local Bus Architecture Specifications Version 4 7 Hopewell Junction NY USA"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2009.2038946"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ACT.2009.167"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/HDP.2005.251460"},{"key":"ref13","first-page":"132","article-title":"A FPGA-based bit-word PLC CPUs development platform","volume":"10","author":"chmiel","year":"0","journal-title":"Proc 10th IFAC Workshop Programm Devices Embedded Syst"},{"key":"ref14","year":"2011","journal-title":"SIMATIC S7-300 FM 352-5 high-speed Boolean processor"},{"key":"ref15","first-page":"64","article-title":"Combining PLC and FPGA architectures","author":"glorioso","year":"0","journal-title":"Proc EngineerIT"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ReConFig.2009.15"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-78610-8_12"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-010-0524-3"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2011.2166962"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2006.02.008"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2012.2206360"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/AERO.2006.1655961"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TII.2011.2123908"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ETFA.2008.4638516"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2011.04.004"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2013.2284133"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/s00170-008-1426-4"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1002\/tee.20670"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2007.898281"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICARCV.2010.5707833"},{"key":"ref1","year":"0","journal-title":"IEC 61131-3 Int Standard Edition 3 0"},{"key":"ref20","first-page":"187","article-title":"FPGA-based execution platform for IEC 61131-3 control software","volume":"2011","author":"hajduk","year":"2011","journal-title":"Elect Rev"},{"key":"ref22","first-page":"133","article-title":"Prototype environment for controller programming in the IEC 61131-3 ST language","volume":"4","author":"rzo?ca","year":"2007","journal-title":"Comput Sci Inf Syst"},{"key":"ref21","first-page":"77","article-title":"Multiple tasks in FPGA-based programmable controller","volume":"5","author":"hajduk","year":"2011","journal-title":"Informatica Exame"},{"key":"ref24","year":"2010","journal-title":"Mini-Guard Ship Control & Positioning System"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-38865-1_21"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2013.10.004"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.2478\/v10179-011-0002-z"}],"container-title":["IEEE Transactions on Industrial Electronics"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/41\/7080969\/06923473.pdf?arnumber=6923473","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:30:50Z","timestamp":1642005050000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/6923473"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,5]]},"references-count":33,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/tie.2014.2362888","relation":{},"ISSN":["0278-0046","1557-9948"],"issn-type":[{"value":"0278-0046","type":"print"},{"value":"1557-9948","type":"electronic"}],"subject":[],"published":{"date-parts":[[2015,5]]}}}